Issued Patents 2021
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11201205 | Interconnect layout for semiconductor device | Chun Hsiung Tsai, Shahaji B. More, Yu-Ming Lin | 2021-12-14 |
| 11177368 | Semiconductor arrangement | Wei-Chieh Chen, Hao-Hsiung Lin, Shu-Han Chen, You-Ru Lin, Cheng-Hsien Wu +1 more | 2021-11-16 |
| 11158725 | Fin structure of fin field effect transistor | Feng Yuan, Hung-Ming Chen, Tsung-Lin Lee, Chang-Yun Chang | 2021-10-26 |
| 11158719 | Method of manufacturing semiconductor devices and semiconductor devices | Yi-Jing Lee, Chih-Shin Ko | 2021-10-26 |
| 11133222 | Method for manufacturing semiconductor structure | Chun Hsiung Tsai, Cheng-Yi Peng, Ching-Hua Lee, Yu-Ming Lin | 2021-09-28 |
| 11080453 | Integrated circuit fin layout method, system, and structure | Po-Hsiang Huang, Sheng-Hsiung Chen, Chih-Hsin Ko, Fong-Yuan Chang, Li-Chun Tien +1 more | 2021-08-03 |
| 11075108 | Mechanism for FinFET well doping | Chun Hsiung Tsai, Yan-Ting Lin | 2021-07-27 |
| 10978451 | Complimentary metal-oxide-semiconductor (CMOS) with low contact resistivity and method of forming same | Chih-Hsin Ko, Cheng-Hsien Wu, Ding-Kang Shih, Hau-Yu Lin | 2021-04-13 |
| 10971594 | Semiconductor device having modified profile metal gate | Yu-Lien Huang, Chi-Wen Liu, Ming-Huan Tsai, Zhao-Cheng Chen | 2021-04-06 |
| 10943995 | Self-aligned passivation of active regions | Ling-Yen Yeh, Chi-Yuan Shih, Wei-Chun Tsai | 2021-03-09 |
| 10916469 | Systems and methods for a semiconductor structure having multiple semiconductor-device layers | Yi-Tang Lin, Chun Hsiung Tsai | 2021-02-09 |