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Airgap formation processes |
Ashish Pal, Sankuei Lin, Ching-Mei Hsu, Nitin K. Ingle, Ajay Bhatnagar +1 more |
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Method of fabricating a semiconductor device having reduced contact resistance |
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Self-aligned 3-D epitaxial structures for MOS device fabrication |
Glenn A. Glass, Daniel B. Aubertine, Anand S. Murthy, Tahir Ghani |
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$28,241,000 |
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Majority logic gate based sequential circuit |
Sasikanth Manipatruni, Yuan-Sheng Fang, Robert Menezes, Rajeev Kumar Dokania, Ramamoorthy Ramesh +1 more |
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Doped polar layers and semiconductor device incorporating same |
Ramesh Ramamoorthy, Sasikanth Manipatruni |
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Methods and apparatus for metal silicide deposition |
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2021-10-19 |
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Semiconductor device, method of making a semiconductor device, and processing system |
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Processing system and method of forming a contact |
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In-situ integrated chambers |
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Linear input and non-linear output threshold logic gate |
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Linear input and non-linear output majority logic gate |
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Linear input and non-linear output majority logic gate with and/or function |
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Gate contact over active processes |
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Majority logic gate fabrication |
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Low power ferroelectric based majority logic gate adder |
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