Issued Patents 2021
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11171115 | Artificial intelligence processor with three-dimensional stacked memory | Sasikanth Manipatruni, Rajeev Kumar Dokania, Amrita Mathuriya | 2021-11-09 |
| 11165430 | Majority logic gate based sequential circuit | Sasikanth Manipatruni, Yuan-Sheng Fang, Robert Menezes, Rajeev Kumar Dokania, Gaurav Thareja +1 more | 2021-11-02 |
| 11139270 | Artificial intelligence processor with three-dimensional stacked memory | Sasikanth Manipatruni, Rajeev Kumar Dokania, Amrita Mathuriya | 2021-10-05 |
| 11025254 | Linear input and non-linear output threshold logic gate | Sasikanth Manipatruni, Robert Menezes, Yuan-Sheng Fang, Rajeev Kumar Dokania, Gaurav Thareja +1 more | 2021-06-01 |
| 11018672 | Linear input and non-linear output majority logic gate | Sasikanth Manipatruni, Robert Menezes, Yuan-Sheng Fang, Rajeev Kumar Dokania, Gaurav Thareja +1 more | 2021-05-25 |
| 11012076 | Linear input and non-linear output majority logic gate with and/or function | Sasikanth Manipatruni, Robert Menezes, Yuan-Sheng Fang, Rajeev Kumar Dokania, Gaurav Thareja +1 more | 2021-05-18 |
| 10998025 | High-density low voltage non-volatile differential memory bit-cell with shared plate-line | Sasikanth Manipatruni, Rajeev Kumar Dokania | 2021-05-04 |
| 10951213 | Majority logic gate fabrication | Sasikanth Manipatruni, Robert Menezes, Yuan-Sheng Fang, Rajeev Kumar Dokania, Gaurav Thareja +1 more | 2021-03-16 |
| 10944404 | Low power ferroelectric based majority logic gate adder | Sasikanth Manipatruni, Yuan-Sheng Fang, Robert Menezes, Rajeev Kumar Dokania, Gaurav Thareja +1 more | 2021-03-09 |