Issued Patents 2021
Showing 1–22 of 22 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11201153 | Stacked field effect transistor with wrap-around contacts | Ruilong Xie, Alexander Reznicek, Dechao Guo | 2021-12-14 |
| 11183558 | Nanosheet transistor having partially self-limiting bottom isolation extending into the substrate and under the source/drain and gate regions | Veeraraghavan S. Basker, Alexander Reznicek, Junli Wang | 2021-11-23 |
| 11177370 | Vertical field effect transistor with self-aligned source and drain top junction | Ruilong Xie, Alexander Reznicek, Chen Zhang | 2021-11-16 |
| 11171204 | High thermal budget compatible punch through stop integration using doped glass | Kangguo Cheng, Sanjay C. Mehta, Xin Miao | 2021-11-09 |
| 11164793 | Reduced source/drain coupling for CFET | Ruilong Xie, Alexander Reznicek, Chanro Park | 2021-11-02 |
| 11164787 | Two-stage top source drain epitaxy formation for vertical field effect transistors enabling gate last formation | Alexander Reznicek, Zuoguang Liu, Ruilong Xie | 2021-11-02 |
| 11158636 | Nanosheet device integrated with a FINFET transistor | Ruilong Xie, Alexander Reznicek | 2021-10-26 |
| 11152460 | High thermal budget compatible punch through stop integration using doped glass | Kangguo Cheng, Sanjay C. Mehta, Xin Miao | 2021-10-19 |
| 11069684 | Stacked field effect transistors with reduced coupling effect | Ruilong Xie, Dechao Guo, Alexander Reznicek | 2021-07-20 |
| 11062937 | Dielectric isolation for nanosheet devices | Kangguo Cheng, Ruilong Xie, Tenko Yamashita | 2021-07-13 |
| 11056570 | Nanosheet transistor with dual inner airgap spacers | Ruilong Xie, Kangguo Cheng, Tenko Yamashita | 2021-07-06 |
| 11055610 | Circuit for CMOS based resistive processing unit | Yulong Li, Paul M. Solomon, Effendi Leobandung, Seyoung Kim | 2021-07-06 |
| 11055611 | Circuit for CMOS based resistive processing unit | Yulong Li, Paul M. Solomon, Effendi Leobandung, Seyoung Kim | 2021-07-06 |
| 11056386 | Two-dimensional (2D) self-aligned contact (or via) to enable further device scaling | Junli Wang, Veeraraghavan S. Basker, Alexander Reznicek | 2021-07-06 |
| 11038041 | Composite spacer enabling uniform doping in recessed fin devices | Veeraraghavan S. Basker, Zuoguang Liu, Tenko Yamashita | 2021-06-15 |
| 11018240 | Vertical field effect transistor with reduced parasitic capacitance | Kangguo Cheng, Ruilong Xie, Tenko Yamashita | 2021-05-25 |
| 11011528 | Asymmetric gate edge spacing for SRAM structures | Alexander Reznicek, Ruilong Xie, Chen Zhang | 2021-05-18 |
| 10998233 | Mechanically stable complementary field effect transistors | Ruilong Xie, Alexander Reznicek, Chen Zhang | 2021-05-04 |
| 10957761 | Electrical isolation for nanosheet transistor devices | Alexander Reznicek, Veeraraghavan S. Basker, Junli Wang | 2021-03-23 |
| 10916471 | Dual silicide liner flow for enabling low contact resistance | Praneet Adusumilli, Veeraraghavan S. Basker, Zuoguang Liu, Tenko Yamashita | 2021-02-09 |
| 10903365 | Transistors with uniform source/drain epitaxy | Kangguo Cheng, Ruilong Xie, Tenko Yamashita | 2021-01-26 |
| 10896979 | Compact vertical injection punch through floating gate analog memory and a manufacture thereof | Effendi Leobandung, Yulong Li, Tak H. Ning, Paul M. Solomon | 2021-01-19 |