Issued Patents 2020
Showing 1–25 of 31 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10879073 | Insulating gate separation structure for transistor devices | Ruilong Xie, Hui Zang, Laertis Economikos, Andre P. Labonte | 2020-12-29 |
| 10840148 | One-time programmable device compatible with vertical transistor processing | Kangguo Cheng, Juntao Li, Ruilong Xie | 2020-11-17 |
| 10832964 | Replacement contact formation for gate contact over active region with selective metal growth | Ruilong Xie, Balasubramanian Pranatharthiharan, Nicolas Loubet | 2020-11-10 |
| 10832961 | Sacrificial gate spacer regions for gate contacts formed over the active region of a transistor | Su Chen Fan, Ruilong Xie, Veeraraghavan S. Basker, Andre P. Labonte | 2020-11-10 |
| 10832947 | Fully aligned via formation without metal recessing | Ruilong Xie, Kangguo Cheng, Juntao Li | 2020-11-10 |
| 10833165 | Asymmetric air spacer gate-controlled device with reduced parasitic capacitance | Kangguo Cheng, Juntao Li, Son V. Nguyen | 2020-11-10 |
| 10832944 | Interconnect structure having reduced resistance variation and method of forming same | Nicholas V. LiCausi, Ruilong Xie, Andre P. Labonte | 2020-11-10 |
| 10790376 | Contact structures | Ruilong Xie, Julien Frougier, Kangguo Cheng, Andre P. Labonte | 2020-09-29 |
| 10790395 | finFET with improved nitride to fin spacing | Injo Ok, Ruilong Xie, Min Gyu Sung | 2020-09-29 |
| 10788446 | Ion-sensitive field-effect transistor with micro-pillar well to enhance sensitivity | Juntao Li, Kangguo Cheng, Ruilong Xie | 2020-09-29 |
| 10770454 | On-chip metal-insulator-metal (MIM) capacitor and methods and systems for forming same | Ruilong Xie, Kangguo Cheng, Juntao Li | 2020-09-08 |
| 10770585 | Self-aligned buried contact for vertical field-effect transistor and method of production thereof | Ruilong Xie, Andre P. Labonte, Daniel Chanemougame | 2020-09-08 |
| 10770566 | Unique gate cap and gate cap spacer structures for devices on integrated circuit products | Julien Frougier, Ruilong Xie, Kangguo Cheng | 2020-09-08 |
| 10770562 | Interlayer dielectric replacement techniques with protection for source/drain contacts | Kangguo Cheng, Juntao Li, Andrew M. Greene, Vimal Kamineni, Adra Carr +1 more | 2020-09-08 |
| 10746691 | Ion-sensitive field effect transistor (ISFET) with enhanced sensitivity | Kangguo Cheng, Ruilong Xie, Juntao Li | 2020-08-18 |
| 10741451 | FinFET having insulating layers between gate and source/drain contacts | Hui Zang, Laertis Economikos, Shesh Mani Pandey, Ruilong Xie | 2020-08-11 |
| 10727136 | Integrated gate contact and cross-coupling contact formation | Hui Zang, Ruilong Xie, Laertis Economikos | 2020-07-28 |
| 10699957 | Late gate cut using selective dielectric deposition | Hui Zang, Ruilong Xie, Jiehui Shu, Laertis Economikos | 2020-06-30 |
| 10699942 | Vertical-transport field-effect transistors having gate contacts located over the active region | Ruilong Xie, Daniel Chanemougame, Steven R. Soss, Lars Liebmann, Hui Zang +1 more | 2020-06-30 |
| 10679906 | Method of forming nanosheet transistor structures with reduced parasitic capacitance and improved junction sharpness | Kangguo Cheng, Ruilong Xie, Tenko Yamashita | 2020-06-09 |
| 10679894 | Airgap spacers formed in conjunction with a late gate cut | Julien Frougier, Ruilong Xie, Kangguo Cheng | 2020-06-09 |
| 10665692 | Non-self aligned gate contacts formed over the active region of a transistor | Ruilong Xie, Kangguo Cheng, Julien Frougier | 2020-05-26 |
| 10658506 | Fin cut last method for forming a vertical FinFET device | Kangguo Cheng | 2020-05-19 |
| 10658243 | Method for forming replacement metal gate and related structures | Ruilong Xie, Daniel Chanemougame, Steven R. Soss, Steven Bentley | 2020-05-19 |
| 10622475 | Uniform bottom spacer for VFET devices | Steven R. Bentley, Cheng Chi, Ruilong Xie, Tenko Yamashita | 2020-04-14 |