TY

Tenko Yamashita

IBM: 68 patents #22 of 11,143Top 1%
Globalfoundries: 20 patents #12 of 837Top 2%
RE Renesas Electronics: 1 patents #231 of 741Top 35%
📍 Schenectady, NY: #2 of 145 inventorsTop 2%
🗺 New York: #10 of 13,137 inventorsTop 1%
Overall (2019): #105 of 560,194Top 1%
78
Patents 2019

Issued Patents 2019

Showing 51–75 of 78 patents

Patent #TitleCo-InventorsDate
10249538 Method of forming vertical field effect transistors with different gate lengths and a resulting structure Yi Qi, Hsien-Ching Lo, Jianwei Peng, Wei Hong, Yanping Shen +5 more 2019-04-02
10249502 Low resistance source drain contact formation with trench metastable alloys and laser annealing Oleg Gluschenkov, Zuoguang Liu, Shogo Mochizuki, Hiroaki Niimi, Chun-Chen Yeh 2019-04-02
10243042 FinFET with reduced parasitic capacitance Kangguo Cheng, Darsen D. Lu, Xin Miao 2019-03-26
10236363 Vertical field-effect transistors with controlled dimensions Ruilong Xie, Chun-Chen Yeh, Kangguo Cheng 2019-03-19
10229915 Mirror contact capacitor Terence B. Hook, Joshua M. Rubin 2019-03-12
10229987 Epitaxial and silicide layer formation at top and bottom surfaces of semiconductor fins Kangguo Cheng, Zuoguang Liu, Ruilong Xie 2019-03-12
10229982 Pure boron for silicide contact Chia-Yu Chen, Zuoguang Liu, Sanjay C. Mehta 2019-03-12
10229905 Electrostatic discharge devices and methods of manufacture Huiming Bu, Junjun Li, Theodorus E. Standaert 2019-03-12
10224207 Forming a contact for a tall fin transistor Kangguo Cheng, Ruilong Xie 2019-03-05
10224420 Punch through stopper in bulk finFET device Veeraraghavan S. Basker, Zuoguang Liu, Chun-Chen Yeh 2019-03-05
10224417 Fin field effect transistor fabrication and devices having inverted T-shaped gate Veeraraghavan S. Basker, Zuoguang Liu, Chun-Chen Yeh 2019-03-05
10217672 Vertical transistor devices with different effective gate lengths Ruilong Xie, Chun-Chen Yeh, Kangguo Cheng 2019-02-26
10211207 Low resistance source/drain contacts for complementary metal oxide semiconductor (CMOS) devices Praneet Adusumilli, Oleg Gluschenkov, Dechao Guo, Zuoguang Liu, Rajasekhar Venigalla 2019-02-19
10211225 FinFET devices wit multiple channel lengths Effendi Leobandung 2019-02-19
10211094 Hybrid source and drain contact formation using metal liner and metal insulator semiconductor contacts Hiroaki Niimi, Shariq Siddiqui 2019-02-19
10199480 Controlling self-aligned gate length in vertical transistor replacement gate flow Ruilong Xie, Kangguo Cheng, Chun-Chen Yeh 2019-02-05
10199464 Techniques for VFET top source/drain epitaxy Kangguo Cheng, Cheng Chi, Chi-Chun Liu, Ruilong Xie, Chun-Chen Yeh 2019-02-05
10177237 Etch stop for airgap protection Kangguo Cheng, Ruilong Xie 2019-01-08
10177223 FinFET with reduced parasitic capacitance Kangguo Cheng, Darsen D. Lu, Xin Miao 2019-01-08
10170551 Sidewall image transfer nanosheet Effendi Leobandung 2019-01-01
10170594 Punch through stopper in bulk finFET device Veeraraghavan S. Basker, Zuoguang Liu, Chun-Chen Yeh 2019-01-01
10170588 Method of forming vertical transport fin field effect transistor with high-K dielectric feature uniformity Chun Wing Yeung, Chen Zhang 2019-01-01
10170583 Forming a gate contact in the active area Kangguo Cheng, Ruilong Xie 2019-01-01
10170582 Uniform bottom spacer for vertical field effect transistor Michael P. Belyansky, Cheng Chi, Ekmini Anuja De Silva 2019-01-01
10170574 Hybrid source and drain contact formation using metal liner and metal insulator semiconductor contacts Hiroaki Niimi, Shariq Siddiqui 2019-01-01