Issued Patents 2019
Showing 76–88 of 88 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10217707 | Trench contact resistance reduction | Zhenxing Bi, Kangguo Cheng, Peng Xu | 2019-02-26 |
| 10217843 | Fabrication of vertical field effect transistor structure with strained channels | Kangguo Cheng | 2019-02-26 |
| 10217841 | Forming an uniform L-shaped inner spacer for a vertical transport fin field effect transistor (VT FinFET) | Kangguo Cheng, Peng Xu, Jingyun Zhang | 2019-02-26 |
| 10217658 | Method and structure for minimizing fin reveal variation in FinFET transistor | Zhenxing Bi, Kangguo Cheng, Hao Tang | 2019-02-26 |
| 10211319 | Stress retention in fins of fin field-effect transistors | Sivananda K. Kanakasabapathy, Gauri Karve, Fee Li Lie, Stuart A. Sieg, John R. Sporre | 2019-02-19 |
| 10211321 | Stress retention in fins of fin field-effect transistors | Sivananda K. Kanakasabapathy, Gauri Karve, Fee Li Lie, Stuart A. Sieg, John R. Sporre | 2019-02-19 |
| 10204836 | Porous silicon relaxation medium for dislocation free CMOS devices | Kangguo Cheng, Ramachandra Divakaruni, Jeehwan Kim, Devendra K. Sadana | 2019-02-12 |
| 10170364 | Stress memorization technique for strain coupling enhancement in bulk finFET device | Kangguo Cheng, Chun-Chen Yeh | 2019-01-01 |
| 10170548 | Integrated capacitors with nanosheet transistors | Kangguo Cheng, James J. Demarest, John G. Gaudiello | 2019-01-01 |
| 10170498 | Strained CMOS on strain relaxation buffer substrate | Kangguo Cheng, Balasubramanian Pranatharthiharan | 2019-01-01 |
| 10168075 | Critical dimension shrink through selective metal growth on metal hardmask sidewalls | Hsueh-Chung Chen, Hong He, Chih-Chao Yang, Yunpeng Yin | 2019-01-01 |
| 10170331 | Stacked nanowires | Zhenxing Bi, Kangguo Cheng, Xin Miao | 2019-01-01 |
| 10170425 | Microstructure of metal interconnect layer | Hong He, Junli Wang, Chih-Chao Yang | 2019-01-01 |