Issued Patents 2018
Showing 1–25 of 25 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10157796 | Forming of marking trenches in structure for multiple patterning lithography | Laertis Economikos, Ruilong Xie, Pei Liu | 2018-12-18 |
| 10121702 | Methods, apparatus and system for forming source/drain contacts using early trench silicide cut | Min Gyu Sung, Ruilong Xie, Puneet Harischandra Suvarna | 2018-11-06 |
| 10115629 | Air gap spacer formation for nano-scale semiconductor devices | Kangguo Cheng, Thomas J. Haigh, Jr., Juntao Li, Eric G. Liniger, Sanjay C. Mehta +2 more | 2018-10-30 |
| 10103238 | Nanosheet field-effect transistor with full dielectric isolation | Hui Zang, Tek Po Rinus Lee, Haigou Huang, Ruilong Xie, Min Gyu Sung | 2018-10-16 |
| 10090402 | Methods of forming field effect transistors (FETS) with gate cut isolation regions between replacement metal gates | Chang Ho Maeng, Pei Liu, Junsic Hong, Laertis Economikos, Ruilong Xie | 2018-10-02 |
| 10084053 | Gate cuts after metal gate formation | Ruilong Xie, Min Gyu Sung | 2018-09-25 |
| 10050118 | Semiconductor device configured for avoiding electrical shorting | Ruilong Xie, Ryan Ryoung-Han Kim, William J. Taylor, Jr., John A. Iacoponi | 2018-08-14 |
| 10038065 | Method of forming a semiconductor device with a gate contact positioned above the active region | Ruilong Xie, Min Gyu Sung, Hoon Kim | 2018-07-31 |
| 10026655 | Dual liner CMOS integration methods for FinFET devices | Min Gyu Sung, Ruilong Xie, Hoon Kim | 2018-07-17 |
| 10014209 | Methods, apparatus and system for local isolation formation for finFET devices | Min Gyu Sung, Ruilong Xie, Hoon Kim, Sukwon Hong | 2018-07-03 |
| 10014389 | Methods of forming IC products comprising a nano-sheet device and a transistor device having first and second replacement gate structures | Ruilong Xie, Min Gyu Sung, Hoon Kim | 2018-07-03 |
| 10008577 | Methods of forming an air-gap spacer on a semiconductor device and the resulting device | Ruilong Xie, Min Gyu Sung, Hoon Kim | 2018-06-26 |
| 10002932 | Self-aligned contact protection using reinforced gate cap and spacer portions | Ruilong Xie, Min Gyu Sung, Hoon Kim | 2018-06-19 |
| 9991131 | Dual mandrels to enable variable fin pitch | Min Gyu Sung, Ruilong Xie | 2018-06-05 |
| 9984919 | Inverted damascene interconnect structures | Xunyuan Zhang, Yongan Xu, Peng Xu, Yann Mignot | 2018-05-29 |
| 9966456 | Methods of forming gate electrodes on a vertical transistor device | Steven Bentley, Hoon Kim, Min Gyu Sung, Ruilong Xie | 2018-05-08 |
| 9953879 | Preventing oxidation defects in strain-relaxed fins by reducing local gap fill voids | Min Gyu Sung, Hoon Kim, Ruilong Xie | 2018-04-24 |
| 9947589 | Methods of forming a gate contact for a transistor above an active region and the resulting device | Ruilong Xie, Lars Liebmann, Andre P. Labonte, Nigel G. Cave, Mark V. Raymond | 2018-04-17 |
| 9947804 | Methods of forming nanosheet transistor with dielectric isolation of source-drain regions and related structure | Julien Frougier, Min Gyu Sung, Ruilong Xie, Steven Bentley | 2018-04-17 |
| 9929048 | Middle of the line (MOL) contacts with two-dimensional self-alignment | Ruilong Xie, Andre P. Labonte, Lars Liebmann | 2018-03-27 |
| 9911619 | Fin cut with alternating two color fin hardmask | Ruilong Xie, Hoon Kim, Catherine B. Labelle, Lars Liebmann, Min Gyu Sung | 2018-03-06 |
| 9899321 | Methods of forming a gate contact for a semiconductor device above the active region | Ruilong Xie, Min Gyu Sung, Hoon Kim | 2018-02-20 |
| 9892961 | Air gap spacer formation for nano-scale semiconductor devices | Kangguo Cheng, Thomas J. Haigh, Jr., Juntao Li, Eric G. Liniger, Sanjay C. Mehta +2 more | 2018-02-13 |
| 9875940 | Methods for forming transistor devices with different threshold voltages and the resulting devices | Hoon Kim, Ruilong Xie, Min Gyu Sung | 2018-01-23 |
| 9859125 | Block patterning method enabling merged space in SRAM with heterogeneous mandrel | Min Gyu Sung, Ruilong Xie, Hoon Kim, Kwan-Yong Lim | 2018-01-02 |