Issued Patents 2018
Showing 1–24 of 24 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10163900 | Integration of vertical field-effect transistors and saddle fin-type field effect transistors | Ruilong Xie, Kwan-Yong Lim | 2018-12-25 |
| 10157798 | Uniform bottom spacers in vertical field effect transistors | Cheng Chi, Ruilong Xie, Tenko Yamashita | 2018-12-18 |
| 10121702 | Methods, apparatus and system for forming source/drain contacts using early trench silicide cut | Chanro Park, Ruilong Xie, Puneet Harischandra Suvarna | 2018-11-06 |
| 10103238 | Nanosheet field-effect transistor with full dielectric isolation | Hui Zang, Tek Po Rinus Lee, Haigou Huang, Ruilong Xie, Chanro Park | 2018-10-16 |
| 10084053 | Gate cuts after metal gate formation | Ruilong Xie, Chanro Park | 2018-09-25 |
| 10038065 | Method of forming a semiconductor device with a gate contact positioned above the active region | Ruilong Xie, Chanro Park, Hoon Kim | 2018-07-31 |
| 10026655 | Dual liner CMOS integration methods for FinFET devices | Chanro Park, Ruilong Xie, Hoon Kim | 2018-07-17 |
| 10014209 | Methods, apparatus and system for local isolation formation for finFET devices | Ruilong Xie, Hoon Kim, Chanro Park, Sukwon Hong | 2018-07-03 |
| 10014389 | Methods of forming IC products comprising a nano-sheet device and a transistor device having first and second replacement gate structures | Ruilong Xie, Chanro Park, Hoon Kim | 2018-07-03 |
| 10014297 | Methods of forming integrated circuit structure using extreme ultraviolet photolithography technique and related integrated circuit structure | Lei Sun, Wenhui Wang, Xunyuan Zhang, Ruilong Xie, Jia Zeng +2 more | 2018-07-03 |
| 10008577 | Methods of forming an air-gap spacer on a semiconductor device and the resulting device | Ruilong Xie, Chanro Park, Hoon Kim | 2018-06-26 |
| 10002932 | Self-aligned contact protection using reinforced gate cap and spacer portions | Ruilong Xie, Hoon Kim, Chanro Park | 2018-06-19 |
| 9991131 | Dual mandrels to enable variable fin pitch | Ruilong Xie, Chanro Park | 2018-06-05 |
| 9978608 | Fin patterning for a fin-type field-effect transistor | Ruilong Xie, Nigel G. Cave, Lars Liebmann | 2018-05-22 |
| 9966456 | Methods of forming gate electrodes on a vertical transistor device | Chanro Park, Steven Bentley, Hoon Kim, Ruilong Xie | 2018-05-08 |
| 9953879 | Preventing oxidation defects in strain-relaxed fins by reducing local gap fill voids | Hoon Kim, Chanro Park, Ruilong Xie | 2018-04-24 |
| 9947804 | Methods of forming nanosheet transistor with dielectric isolation of source-drain regions and related structure | Julien Frougier, Ruilong Xie, Chanro Park, Steven Bentley | 2018-04-17 |
| 9911619 | Fin cut with alternating two color fin hardmask | Ruilong Xie, Hoon Kim, Catherine B. Labelle, Lars Liebmann, Chanro Park | 2018-03-06 |
| 9899321 | Methods of forming a gate contact for a semiconductor device above the active region | Chanro Park, Ruilong Xie, Hoon Kim | 2018-02-20 |
| 9875940 | Methods for forming transistor devices with different threshold voltages and the resulting devices | Hoon Kim, Ruilong Xie, Chanro Park | 2018-01-23 |
| 9876077 | Methods of forming a protection layer on an isolation region of IC products comprising FinFET devices | Ruilong Xie, Christopher M. Prindle, Tek Po Rinus Lee | 2018-01-23 |
| 9875905 | FinFET devices having fins with a tapered configuration and methods of fabricating the same | Ruilong Xie, Catherine B. Labelle | 2018-01-23 |
| 9865704 | Single and double diffusion breaks on integrated circuit products comprised of FinFET devices | Ruilong Xie, Kwan-Yong Lim, Ryan Ryoung-Han Kim | 2018-01-09 |
| 9859125 | Block patterning method enabling merged space in SRAM with heterogeneous mandrel | Ruilong Xie, Chanro Park, Hoon Kim, Kwan-Yong Lim | 2018-01-02 |