Issued Patents 2017
Showing 1–20 of 20 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9847448 | Forming LED structures on silicon fins | Han Wui Then, Robert S. Chau, Marko Radosavljevic, Benjamin Chu-Kung, Sanaz K. Gardner | 2017-12-19 |
| 9847432 | Forming III-V device structures on (111) planes of silicon fins | Han Wui Then, Sanaz K. Gardner, Benjamin Chu-Kung, Marko Radosavljevic, Seung Hoon Sung +1 more | 2017-12-19 |
| 9837499 | Self-aligned gate last III-N transistors | Han Wui Then, Seung Hoon Sung, Sanaz K. Gardner, Marko RADOSAVLIJEVIC, Robert S. Chau | 2017-12-05 |
| 9806203 | Nonplanar III-N transistors with compositionally graded semiconductor channels | Han Wui Then, Marko Radosavljevic, Benjamin Chu-Kung, Seung Hoon Sung, Sanaz K. Gardner +1 more | 2017-10-31 |
| 9748371 | Transition metal dichalcogenide semiconductor assemblies | Marko Radosavljevic, Brian S. Doyle, Ravi Pillarisetty, Niloy Mukherjee, Han Wui Then +1 more | 2017-08-29 |
| 9716149 | Group III-N transistors on nanoscale template structures | Han Wui Then, Marko Radosavljevic, Benjamin Chu-Kung, Sanaz K. Gardner, Seung Hoon Sung +1 more | 2017-07-25 |
| 9698013 | Methods and structures to prevent sidewall defects during selective epitaxy | Niloy Mukherjee, Niti Goel, Sanaz K. Gardner, Pragyansri Pathi, Matthew V. Metz +6 more | 2017-07-04 |
| 9698222 | Method of fabricating semiconductor structures on dissimilar substrates | Benjamin Chu-Kung, Sherry R. Taft, Van H. Le, Seung Hoon Sung, Sanaz K. Gardner +3 more | 2017-07-04 |
| 9673045 | Integration of III-V devices on Si wafers | Han Wui Then, Seung Hoon Sung, Sanaz K. Gardner, Marko Radosavljevic, Benjamin Chu-Kung +1 more | 2017-06-06 |
| 9666708 | III-N transistors with enhanced breakdown voltage | Han Wui Then, Benjamin Chu-Kung, Robert S. Chau, Seung Hoon Sung, Ravi Pillarisetty +1 more | 2017-05-30 |
| 9660064 | Low sheet resistance GaN channel on Si substrates using InAlN and AlGaN bi-layer capping stack | Han Wui Then, Marko Radosavljevic, Sanaz K. Gardner, Seung Hoon Sung, Benjamin Chu-Kung +1 more | 2017-05-23 |
| 9660085 | Wide band gap transistors on non-native semiconductor substrates and methods of manufacture thereof | Han Wui Then, Robert S. Chau, Marko Radosavljevic, Benjamin Chu-Kung, Seung Hoon Sung +2 more | 2017-05-23 |
| 9660067 | III-N transistors with epitaxial layers providing steep subthreshold swing | Han Wui Then, Marko Radosavljevic, Robert S. Chau | 2017-05-23 |
| 9640537 | Non-silicon device heterolayers on patterned silicon substrate for CMOS by combination of selective and conformal epitaxy | Niti Goel, Robert S. Chau, Jack T. Kavalieros, Benjamin Chu-Kung, Matthew V. Metz +7 more | 2017-05-02 |
| 9640422 | III-N devices in Si trenches | Han Wui Then, Sanaz K. Gardner, Seung Hoon Sung, Marko Radosavljevic, Benjamin Chu-Kung +3 more | 2017-05-02 |
| 9634007 | Trench confined epitaxially grown device layer(s) | Ravi Pillarisetty, Seung Hoon Sung, Niti Goel, Jack T. Kavalieros, Van H. Le +7 more | 2017-04-25 |
| 9590069 | Self-aligned structures and methods for asymmetric GaN transistors and enhancement mode operation | Han Wui Then, Marko Radosavljevic, Niloy Mukherjee, Niti Goel, Sanaz K. Gardner +3 more | 2017-03-07 |
| 9583396 | Making a defect free fin based device in lateral epitaxy overgrowth region | Niti Goel, Benjamin Chu-Kung, Niloy Mukherjee, Matthew V. Metz, Van H. Le +3 more | 2017-02-28 |
| 9583574 | Epitaxial buffer layers for group III-N transistors on silicon substrates | Han Wui Then, Niloy Mukherjee, Marko Radosavljevic, Robert S. Chau | 2017-02-28 |
| 9570614 | Ge and III-V channel semiconductor devices having maximized compliance and free surface relaxation | Ravi Pillarisetty, Niti Goel, Van H. Le, Marko Radosavljevic, Gilbert Dewey +8 more | 2017-02-14 |