Issued Patents 2017
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9852980 | Interconnect structure having substractive etch feature and damascene feature | Griselda Bonilla, Samuel S. Choi, Ronald G. Filippi, Naftali E. Lustig, Andrew H. Simon | 2017-12-26 |
| 9806023 | Selective and non-selective barrier layer wet removal | Benjamin D. Briggs, Raghuveer R. Patlolla, Cornelius Brown Peethala, David L. Rath, Hosadurga Shobha | 2017-10-31 |
| 9793193 | Air gap and air spacer pinch off | Griselda Bonilla, Son V. Nguyen, Takeshi Nogami, Christopher J. Penny, Deepika Priyadarshini | 2017-10-17 |
| 9786760 | Air gap and air spacer pinch off | Griselda Bonilla, Son V. Nguyen, Takeshi Nogami, Christopher J. Penny, Deepika Priyadarshini | 2017-10-10 |
| 9759766 | Electromigration test structure for Cu barrier integrity and blech effect evaluations | Griselda Bonilla, Chao-Kun Hu, Baozhen Li, Paul S. McLaughlin | 2017-09-12 |
| 9711455 | Method of forming an air gap semiconductor structure with selective cap bilayer | Stephen M. Gates, Dimitri Kioussis, Christopher J. Penny, Deepika Priyadarshini | 2017-07-18 |
| 9685406 | Selective and non-selective barrier layer wet removal | Benjamin D. Briggs, Raghuveer R. Patlolla, Cornelius Brown Peethala, David L. Rath, Hosadurga Shobha | 2017-06-20 |
| 9666529 | Method and structure to reduce the electric field in semiconductor wiring interconnects | Takeshi Nogami, Raghuveer R. Patlolla, Christopher J. Penny, Theodorus E. Standaert | 2017-05-30 |
| 9601426 | Interconnect structure having subtractive etch feature and damascene feature | Griselda Bonilla, Samuel S. Choi, Ronald G. Filippi, Naftali E. Lustig, Andrew H. Simon | 2017-03-21 |