Issued Patents 2004
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6803275 | ONO fabrication process for reducing oxygen vacancy content in bottom oxide layer in flash memory devices | Jaeyong Park, Arvind Halliyal, Jean Y. Yang, Inkuk Kang, Tazrien Kamal +1 more | 2004-10-12 |
| 6803265 | Liner for semiconductor memories and manufacturing method therefor | Minh Van Ngo, Arvind Halliyal, Tazrien Kamal, Rinji Sugino, Dawn Hopper +1 more | 2004-10-12 |
| 6794764 | Charge-trapping memory arrays resistant to damage from contact hole information | Tazrien Kamal, Mark T. Ramsbey, Fred Cheung | 2004-09-21 |
| 6765254 | Structure and method for preventing UV radiation damage and increasing data retention in memory cells | Angela T. Hui, Minh Van Ngo, Ning Cheng, Jaeyong Park, Jean Y. Yang +3 more | 2004-07-20 |
| 6754105 | Trench side wall charge trapping dielectric flash memory device | Chi Chang, Wei Zheng | 2004-06-22 |
| 6740605 | Process for reducing hydrogen contamination in dielectric materials in memory devices | Jaeyong Park, Fred Cheung, Arvind Halliyal | 2004-05-25 |
| 6730564 | Salicided gate for virtual ground arrays | Mark T. Ramsbey, Yu Sun, Chi Chang | 2004-05-04 |
| 6720133 | Memory manufacturing process using disposable ARC for wordline formation | Mark T. Ramsbey, Kouros Ghandehari, Tazrien Kamal, Jean Y. Yang, Emmanuil H. Lingunis | 2004-04-13 |
| 6706595 | Hard mask process for memory device without bitline shorts | Jean Y. Yang, Mark T. Ramsbey, Yider Wu, Emmanuil Lingunis, Tazrien Kamal | 2004-03-16 |
| 6707078 | Dummy wordline for erase and bitline leakage | Yider Wu, Jean Y. Yang, Mark T. Ramsbey, Darlene Hamilton | 2004-03-16 |