Issued Patents 2004
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6803275 | ONO fabrication process for reducing oxygen vacancy content in bottom oxide layer in flash memory devices | Jaeyong Park, Hidehiko Shiraiwa, Arvind Halliyal, Jean Y. Yang, Inkuk Kang +1 more | 2004-10-12 |
| 6803265 | Liner for semiconductor memories and manufacturing method therefor | Minh Van Ngo, Arvind Halliyal, Hidehiko Shiraiwa, Rinji Sugino, Dawn Hopper +1 more | 2004-10-12 |
| 6794764 | Charge-trapping memory arrays resistant to damage from contact hole information | Mark T. Ramsbey, Hidehiko Shiraiwa, Fred Cheung | 2004-09-21 |
| 6774432 | UV-blocking layer for reducing UV-induced charging of SONOS dual-bit flash memory devices in BEOL | Minh Van Ngo, Mark T. Ramsbey, Arvind Halliyal, Jaeyong Park, Ning Cheng +6 more | 2004-08-10 |
| 6773988 | Memory wordline spacer | Kashmir Sahota, Mark T. Ramsbey | 2004-08-10 |
| 6765254 | Structure and method for preventing UV radiation damage and increasing data retention in memory cells | Angela T. Hui, Minh Van Ngo, Ning Cheng, Jaeyong Park, Jean Y. Yang +3 more | 2004-07-20 |
| 6720133 | Memory manufacturing process using disposable ARC for wordline formation | Mark T. Ramsbey, Kouros Ghandehari, Jean Y. Yang, Emmanuil H. Lingunis, Hidehiko Shiraiwa | 2004-04-13 |
| 6706595 | Hard mask process for memory device without bitline shorts | Jean Y. Yang, Mark T. Ramsbey, Hidehiko Shiraiwa, Yider Wu, Emmanuil Lingunis | 2004-03-16 |