Issued Patents 2004
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6797565 | Methods for fabricating and planarizing dual poly scalable SONOS flash memory | Jean Y. Yang, Zhizheng Liu | 2004-09-28 |
| 6767791 | Structure and method for suppressing oxide encroachment in a floating gate memory cell | Harpreet Sachar, Jean Y. Yang | 2004-07-27 |
| 6754106 | Reference cell with various load circuits compensating for source side loading effects in a non-volatile memory | Jean Y. Yang, Jiang Li | 2004-06-22 |
| 6737701 | Structure and method for reducing charge loss in a memory cell | Amy C. Tu, Jean Y. Yang | 2004-05-18 |
| 6707078 | Dummy wordline for erase and bitline leakage | Hidehiko Shiraiwa, Jean Y. Yang, Mark T. Ramsbey, Darlene Hamilton | 2004-03-16 |
| 6706595 | Hard mask process for memory device without bitline shorts | Jean Y. Yang, Mark T. Ramsbey, Hidehiko Shiraiwa, Emmanuil Lingunis, Tazrien Kamal | 2004-03-16 |
| 6680509 | Nitride barrier layer for protection of ONO structure from top oxide loss in fabrication of SONOS flash memory | Jean Y. Yang, Mark T. Ramsbey, Emmanuel H. Lingunis, Yu Sun | 2004-01-20 |