Issued Patents 2003
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6667205 | Method of forming retrograde n-well and p-well | Matthew J. Breitwisch, James A. Slinkman | 2003-12-23 |
| 6657252 | FinFET CMOS with NVRAM capability | David M. Fried, Edward J. Nowak | 2003-12-02 |
| 6614124 | Simple 4T static ram cell for low power CMOS applications | Jeffrey S. Brown, Randy W. Mann | 2003-09-02 |
| 6570209 | Merged self-aligned source and ONO capacitor for split gate non-volatile memory | — | 2003-05-27 |
| 6566759 | Self-aligned contact areas for sidewall image transfer formed conductors | Edward W. Conrad, Dale W. Martin, Edmund J. Sprogis | 2003-05-20 |
| 6548418 | Dual layer etch stop barrier | Eric Lee, Francis R. White | 2003-04-15 |
| 6544874 | Method for forming junction on insulator (JOI) structure | Jack A. Mandelman, Kevin K. Chan, Bomy Chen, Oleg Gluschenkov, Rajarao Jammy +2 more | 2003-04-08 |
| 6541815 | High-density dual-cell flash memory structure | Jack A. Mandelman, Louis L. Hsu, Carl Radens | 2003-04-01 |
| 6534807 | Local interconnect junction on insulator (JOI) structure | Jack A. Mandelman, Dong Gan | 2003-03-18 |
| 6525371 | Self-aligned non-volatile random access memory cell and process to make the same | Jeffrey B. Johnson, Dana Lee, Dale W. Martin, Jed H. Rankin | 2003-02-25 |
| 6518614 | Embedded one-time programmable non-volatile memory using prompt shift device | Matthew J. Breitwisch, Bomy Chen | 2003-02-11 |
| 6504207 | Method to create EEPROM memory structures integrated with high performance logic and NVRAM, and operating conditions for the same | Bomy Chen, Jay G. Harrington, Kevin M. Houlihan, Dennis Hoyniak, Hyun Koo Lee +2 more | 2003-01-07 |