JB

Jeffrey S. Brown

IBM: 3 patents #593 of 5,539Top 15%
Lsi Logic: 1 patents #161 of 465Top 35%
📍 Leland, MS: #1 of 1 inventorsTop 100%
🗺 Mississippi: #4 of 235 inventorsTop 2%
Overall (2003): #15,939 of 273,478Top 6%
4
Patents 2003

Issued Patents 2003

Showing 1–4 of 4 patents

Patent #TitleCo-InventorsDate
6624031 Test structure and methodology for semiconductor stress-induced defects and antifuse based on same test structure Wagdi W. Abadeer, Eric Adler, Robert J. Gauthier, Jr., Jonathan M. McKenna, Jed H. Rankin +2 more 2003-09-23
6614124 Simple 4T static ram cell for low power CMOS applications Chung H. Lam, Randy W. Mann 2003-09-02
6610585 Method for forming a retrograde implant Bryant C. Colwill, Terence B. Hook, Dennis Hoyniak 2003-08-26
6529436 Supply degradation compensation for memory self time circuits 2003-03-04