JD

Javier A. Delacruz

XC Xcelsis: 36 patents #1 of 19Top 6%
IN Invensas: 34 patents #12 of 142Top 9%
AT Adeia Semiconductor Bonding Technologies: 29 patents #7 of 46Top 20%
IT Invensas Bonding Technologies: 22 patents #4 of 21Top 20%
AS Adeia Semiconductor: 15 patents #1 of 14Top 8%
ES Esilicon: 6 patents #3 of 22Top 15%
W& Whitaker &: 1 patents #650 of 1,437Top 50%
📍 San Jose, CA: #115 of 32,062 inventorsTop 1%
🗺 California: #1,075 of 386,348 inventorsTop 1%
Overall (All Time): #6,832 of 4,157,543Top 1%
143
Patents All Time

Issued Patents All Time

Showing 126–143 of 143 patents

Patent #TitleCo-InventorsDate
10269708 Increased contact alignment tolerance for direct bonding Paul M. Enquist, Gaius Gillman Fountain, Jr. 2019-04-23
10149377 Stacked transmission line Shaowu Huang, Belgacem Haba 2018-12-04
10050003 Elongated pad structure 2018-08-14
10018670 Wireless probes 2018-07-10
10002844 Bonded structures Liang Wang, Rajesh Katkar, Arkalgud R. Sitaram 2018-06-19
9984992 Embedded wire bond wires for vertical integration with separate surface mount and wire bond mounting surfaces Abiola Awujoola, Ashok S. Prabhu, Christopher W. Lattin, Zhuowen Sun 2018-05-29
9984997 Communication interface architecture using serializer/deserializer 2018-05-29
9972582 Warpage balancing in thin packages Belgacem Haba, Sangil Lee, Craig Mitchell, Gabriel Z. Guevara 2018-05-15
9935075 Wire bonding method and apparatus for electromagnetic interference shielding Shaowu Huang 2018-04-03
9859257 Flipped die stacks with multiple rows of leadframe interconnects Belgacem Haba, Tu Tam Vu, Rajesh Katkar 2018-01-02
9852988 Increased contact alignment tolerance for direct bonding Paul M. Enquist, Gaius Gillman Fountain, Jr. 2017-12-26
9659848 Stiffened wires for offset BVA Grant Villavicencio, Sangil Lee, Roseann Alatorre, Scott McGrath 2017-05-23
9595511 Microelectronic packages and assemblies with improved flyby signaling operation Belgacem Haba, Zhuowen Sun 2017-03-14
9508691 Flipped die stacks with multiple rows of leadframe interconnects Belgacem Haba, Tu Tam Vu, Rajesh Katkar 2016-11-29
9461000 Parallel signal via structure 2016-10-04
9435846 Testing of thru-silicon vias 2016-09-06
9263409 Mixed-sized pillars that are probeable and routable 2016-02-16
6051871 Heterojunction bipolar transistor having improved heat dissipation Xiangdong Zhang, Matthew Francis O'Keefe, Gregory Henderson, Yong-Hoon Yun 2000-04-18