Issued Patents All Time
Showing 76–100 of 201 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7228865 | FRAM capacitor stack clean | Lindsey Hall | 2007-06-12 |
| 7220600 | Ferroelectric capacitor stack etch cleaning methods | Lindsey Hall, Kezhakkedath R. Udayakumar, Theodore S. Moise | 2007-05-22 |
| 7183602 | Ferroelectric capacitor hydrogen barriers and methods for fabricating the same | K. Udayakumar, Theodore S. Moise | 2007-02-27 |
| 7115461 | High permittivity silicate gate dielectric | John Mark Anthony, Robert M. Wallace, Glen Wilk | 2006-10-03 |
| 7029925 | FeRAM capacitor stack etch | Francis G. Celii, Mahesh Thakre | 2006-04-18 |
| 7019352 | Low silicon-hydrogen sin layer to inhibit hydrogen related degradation in semiconductor devices having ferroelectric components | K. Udayakumar, Martin G. Albrecht, Theodore S. Moise, Sarah Hartwig | 2006-03-28 |
| 6984857 | Hydrogen barrier for protecting ferroelectric capacitors in a semiconductor device and methods for fabricating the same | K. Udayakumar, Martin G. Albrecht, Theodore S. Moise, Sanjeev Aggarwal, Jeff L. Large | 2006-01-10 |
| 6982448 | Ferroelectric capacitor hydrogen barriers and methods for fabricating the same | K. Udayakumar, Theodore S. Moise | 2006-01-03 |
| 6970371 | Reference generator system and methods for reading ferroelectric memory cells using reduced bitline voltages | Hugh P. McAdams | 2005-11-29 |
| 6967365 | Ferroelectric memory cell with angled cell transistor active region and methods for fabricating the same | Katsushi Boku | 2005-11-22 |
| 6911689 | Versatile system for chromium based diffusion barriers in electrode structures | Wei-Yung Hsu, Paul McIntyre | 2005-06-28 |
| 6902939 | Integrated circuit and method | Theodore S. Moise, Guoqiang Xing, Mark Visokay, Justin Gaynor, Stephen Roy Gilbert +2 more | 2005-06-07 |
| 6876021 | Use of amorphous aluminum oxide on a capacitor sidewall for use as a hydrogen barrier | J. Scott Martin, Theodore S. Moise, Kelly Taylor, Luigi Colombo, Sanjeev Aggarwal +3 more | 2005-04-05 |
| 6872669 | PZT (111) texture through Ir texture improvement | Sanjeev Aggarwal | 2005-03-29 |
| 6867447 | Ferroelectric memory cell and methods for fabricating the same | — | 2005-03-15 |
| 6841439 | High permittivity silicate gate dielectric | John Mark Anthony, Robert M. Wallace, Glen Wilk | 2005-01-11 |
| 6841396 | VIA0 etch process for FRAM integration | Francis G. Celii, K. Udayakumar, Theodore S. Moise | 2005-01-11 |
| 6828161 | Method of forming an FeRAM having a multi-layer hard mask and patterning thereof | Sanjeev Aggarwal, Luigi Colombo, Theodore S. Moise, J. Scott Martin | 2004-12-07 |
| 6819601 | Programmable reference for 1T/1C ferroelectric memories | Jarrod Eliason, Bill Kraus, Hugh P. McAdams, Theodore S. Moise | 2004-11-16 |
| 6807080 | Enhanced storage states in an memory | Jurgen Thomas Rickes, Hugh P. McAdams | 2004-10-19 |
| 6773930 | Method of forming an FeRAM capacitor having a bottom electrode diffusion barrier | Sanjeev Aggarwal, Tomojuki Sakoda, Chiu Chi, Theodore S. Moise | 2004-08-10 |
| 6767750 | Detection of AIOx ears for process control in FeRAM processing | Tomohuki Sakoda, Chiu Chi | 2004-07-27 |
| 6734477 | Fabricating an embedded ferroelectric memory cell | Ted S. Moise, Eden Zielinski, Scott Johnson | 2004-05-11 |
| 6730616 | Versatile plasma processing system for producing oxidation resistant barriers | — | 2004-05-04 |
| 6713342 | FeRAM sidewall diffusion barrier etch | Francis G. Celii, Tomoyuki Sakoda, Chiu Chi | 2004-03-30 |