Issued Patents All Time
Showing 176–200 of 231 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7893499 | MOS transistor with gate trench adjacent to drain extension field insulation | Marie Denison, Binghua Hu, Taylor R. Efland, Sridhar Seetharaman | 2011-02-22 |
| 7888196 | Trench isolation comprising process having multiple gate dielectric thicknesses and integrated circuits therefrom | Seetharaman Sridhar, Dan M. Mosher | 2011-02-15 |
| 7883973 | Method of forming semiconductor wells | Seetharaman Sridar, Marie Denison | 2011-02-08 |
| 7847351 | Lateral metal oxide semiconductor drain extension design | Marie Denison, Seetharaman Sridhar | 2010-12-07 |
| 7846789 | Isolation trench with rounded corners for BiCMOS process | John Lin, Philip L. Hower, Steven L. Merchant | 2010-12-07 |
| 7772644 | Vertical diffused MOSFET | Binghua Hu | 2010-08-10 |
| 7772075 | Formation of a MOSFET using an angled implant | Binghua Hu | 2010-08-10 |
| 7745294 | Methods of manufacturing trench isolated drain extended MOS (demos) transistors and integrated circuits therefrom | Binghua Hu | 2010-06-29 |
| 7732863 | Laterally diffused MOSFET | Binghua Hu | 2010-06-08 |
| 7713825 | LDMOS transistor double diffused region formation process | Binghua Hu, Bill Wofford, Qingfeng Wang | 2010-05-11 |
| 7687853 | System and method for making a LDMOS device with electrostatic discharge protection | Jonathan Brodsky | 2010-03-30 |
| 7618870 | Non-uniformly doped high voltage drain-extended transistor and method of manufacture thereof | Shanjen Pan, James Robert Todd | 2009-11-17 |
| 7602019 | Drive circuit and drain extended transistor for use therein | — | 2009-10-13 |
| 7562315 | Edge recognition based high voltage pseudo layer verification methodology for mix signal design layout | Lily Springer, Haim Horovitz, Robert G. Shaw, Wen-Hwa Chu, Paul C. Mannas | 2009-07-14 |
| 7514329 | Robust DEMOS transistors and method for making the same | Ramanathan Ramani, Taylor R. Efland | 2009-04-07 |
| 7514292 | Individualized low parasitic power distribution lines deposited over active integrated circuits | Taylor R. Efland, Milton L. Buschbom | 2009-04-07 |
| 7498652 | Non-uniformly doped high voltage drain-extended transistor and method of manufacture thereof | Shanjen Pan, James Robert Todd | 2009-03-03 |
| 7468537 | Drain extended PMOS transistors and methods for making the same | — | 2008-12-23 |
| 7435659 | Method for manufacturing a semiconductor device having an alignment feature formed using an N-type dopant and a wet oxidation process | Binghua Hu, Bill Wofford, Joseph Ramirez | 2008-10-14 |
| 7427795 | Drain-extended MOS transistors and methods for making the same | — | 2008-09-23 |
| 7414287 | System and method for making a LDMOS device with electrostatic discharge protection | Jonathan Brodsky | 2008-08-19 |
| 7262471 | Drain extended PMOS transistor with increased breakdown voltage | Shanjen Pan, James Robert Todd | 2007-08-28 |
| 7238986 | Robust DEMOS transistors and method for making the same | Ramanathan Ramani, Taylor R. Efland | 2007-07-03 |
| 7235451 | Drain extended MOS devices with self-aligned floating region and fabrication methods therefor | Pinghai Hao, Shanjen Pan | 2007-06-26 |
| 7208364 | Methods of fabricating high voltage devices | Shanjen Pan, Pinghai Hao, James Robert Todd | 2007-04-24 |