Issued Patents All Time
Showing 126–150 of 231 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9159725 | Controlled on and off time scheme for monolithic cascoded power transistors | Hassan Pooya Forghani-Zadeh | 2015-10-13 |
| 9136368 | Trench gate trench field plate semi-vertical semi-lateral MOSFET | Marie Denison, Guru Mathur | 2015-09-15 |
| 9123802 | Vertical trench MOSFET device in integrated power technologies | Guru Mathur, Marie Denison | 2015-09-01 |
| 9117691 | Low cost transistors | Pinghai Hao | 2015-08-25 |
| 9117687 | High voltage CMOS with triple gate oxide | Binghua Hu, Pinghai Hao, Seetharaman Sridhar, Jarvis Benjamin Jacobs | 2015-08-25 |
| 9093301 | Driver for normally on III-nitride transistors to get normally-off functionality | Naveen Tipirneni | 2015-07-28 |
| 9076863 | Semiconductor structure with a doped region between two deep trench isolation structures | Takehito Tamura, Binghua Hu, Guru Mathur | 2015-07-07 |
| 9076760 | JFET having width defined by trench isolation | Binghua Hu, Pinghai Hao | 2015-07-07 |
| 9064726 | Low-cost CMOS structure with dual gate dielectrics and method of forming the CMOS structure | Pinghai Hao, Amitava Chatterjee | 2015-06-23 |
| 9054027 | III-nitride device and method having a gate isolating structure | Naveen Tipirneni, Jungwoo Joh | 2015-06-09 |
| 9054071 | Method to form stepped dielectric for field plate formation | Naveen Tipirneni | 2015-06-09 |
| 9035318 | Avalanche energy handling capable III-nitride transistors | Naveen Tipirneni | 2015-05-19 |
| 8933461 | III-nitride enhancement mode transistors with tunable and high gate-source voltage rating | Naveen Tipirneni | 2015-01-13 |
| 8890248 | Bi-directional ESD protection circuit | Timothy Patrick Pauletti, Wayne T. Chen, Jonathan Brodsky, Robert Steinhoff | 2014-11-18 |
| 8878330 | Integrated high voltage divider | Hideaki Kawahara, Marie Denison, Philip L. Hower, John Lin, Robert A. Neidorff | 2014-11-04 |
| 8878284 | Programmable SCR for LDMOS ESD protection | Suhail Murtaza, Juergen Wittmann | 2014-11-04 |
| 8872273 | Integrated gate controlled high voltage divider | Hideaki Kawahara, Marie Denison, Philip L. Hower, John Lin, Robert A. Neidorff | 2014-10-28 |
| 8853029 | Method of making vertical transistor with graded field plate dielectric | Marie Denison, Philip L. Hower, John Lin | 2014-10-07 |
| 8829613 | Stepped dielectric for field plate formation | Naveen Tipirneni | 2014-09-09 |
| 8790981 | Low cost high voltage power FET and fabrication | Byron Neville Burgess | 2014-07-29 |
| 8766359 | Lateral superjunction extended drain MOS transistor | Marie Denison | 2014-07-01 |
| 8759879 | RESURF III-nitride HEMTs | Naveen Tipirneni, Jungwoo Joh | 2014-06-24 |
| 8754469 | Hybrid active-field gap extended drain MOS transistor | John Lin | 2014-06-17 |
| 8754497 | Strained LDMOS and demos | Marie Denison, Seetharaman Sridhar, Umamaheswari Aghoram | 2014-06-17 |
| 8749024 | Stacked ESD clamp with reduced variation in clamp voltage | Marie Denison, Yongxi Zhang | 2014-06-10 |