Issued Patents All Time
Showing 25 most recent of 49 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11152459 | Lateral MOSFET with buried drain extension layer | Marie Denison, Sameer Pendharkar | 2021-10-19 |
| 10937905 | Transistor having double isolation with one floating isolation | Yongxi Zhang, Sameer Pendharkar, John Lin, Guru Mathur, Scott Balster +1 more | 2021-03-02 |
| 10601422 | Integrated high-side driver for P-N bimodal power device | Yongxi Zhang, Sameer Pendharkar, Salvatore Giombanco, Filippo Marino, Seetharaman Sridhar | 2020-03-24 |
| 10535731 | Lateral MOSFET with buried drain extension layer | Marie Denison, Sameer Pendharkar | 2020-01-14 |
| 10446734 | Vertical thermoelectric structures | Barry Jon Male | 2019-10-15 |
| 10319809 | Structures to avoid floating resurf layer in high voltage lateral devices | Yongxi Zhang, John Lin, Guru Mathur, Scott Balster, Constantin Bulucea +2 more | 2019-06-11 |
| 9985095 | Lateral MOSFET with buried drain extension layer | Marie Denison, Sameer Pendharkar | 2018-05-29 |
| 9947784 | High voltage lateral extended drain MOS transistor with improved drift layer contact | Sameer Pendharkar, Marie Denison | 2018-04-17 |
| 9876071 | Structures to avoid floating RESURF layer in high voltage lateral devices | Yongxi Zhang, John Lin, Guru Mathur, Scott Balster, Constantin Bulucea +2 more | 2018-01-23 |
| 9843322 | Integrated high-side driver for P-N bimodal power device | Yongxi Zhang, Sameer Pendharkar, Salvatore Giombanco, Filippo Marino, Seetharaman Sridhar | 2017-12-12 |
| 9831320 | High voltage lateral DMOS transistor with optimized source-side blocking capability | Sameer Pendharkar, Marie Denison | 2017-11-28 |
| 9806190 | High voltage drain extension on thin buried oxide SOI | Marie Denison, Sameer Pendharkar | 2017-10-31 |
| 9793375 | High voltage lateral DMOS transistor with optimized source-side blocking capability | Sameer Pendharkar, Marie Denison | 2017-10-17 |
| 9543149 | High voltage lateral extended drain MOS transistor with improved drift layer contact | Sameer Pendharkar, Marie Denison | 2017-01-10 |
| 9508869 | High voltage depletion mode N-channel JFET | Sameer Pendharkar, Marie Denison | 2016-11-29 |
| 9397211 | Lateral MOSFET with buried drain extension layer | Marie Denison, Sameer Pendharkar | 2016-07-19 |
| 9349933 | Vertical thermoelectric structures | Barry Jon Male | 2016-05-24 |
| 9299832 | High voltage lateral DMOS transistor with optimized source-side blocking capability | Sameer Pendharkar, Marie Denison | 2016-03-29 |
| 9202692 | High voltage depletion mode N-channel JFET | Sameer Pendharkar, Marie Denison | 2015-12-01 |
| 9087708 | IC with floating buried layer ring for isolation of embedded islands | John Lin | 2015-07-21 |
| 8878330 | Integrated high voltage divider | Hideaki Kawahara, Marie Denison, Sameer Pendharkar, John Lin, Robert A. Neidorff | 2014-11-04 |
| 8872273 | Integrated gate controlled high voltage divider | Hideaki Kawahara, Marie Denison, Sameer Pendharkar, John Lin, Robert A. Neidorff | 2014-10-28 |
| 8853029 | Method of making vertical transistor with graded field plate dielectric | Marie Denison, Sameer Pendharkar, John Lin | 2014-10-07 |
| 8728846 | Vertical thermoelectric structures | Barry Jon Male | 2014-05-20 |
| 8643099 | Integrated lateral high voltage MOSFET | Marie Denison, Sameer Pendharkar | 2014-02-04 |