Issued Patents All Time
Showing 1–25 of 32 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12113062 | Fringe capacitor, integrated circuit and manufacturing process for the fringe capacitor | Maik Peter Kaufmann, Michael Lueders, Jungwoo Joh | 2024-10-08 |
| 12046666 | Gallium nitride (GaN) based transistor with multiple p-GaN blocks | Chang Soo Suh, Sameer Pendharkar, Jungwoo Joh | 2024-07-23 |
| 11177378 | HEMT having conduction barrier between drain fingertip and source | Jungwoo Joh, Chang Soo Suh, Sameer Pendharkar | 2021-11-16 |
| 11049960 | Gallium nitride (GaN) based transistor with multiple p-GaN blocks | Chang Soo Suh, Sameer Pendharkar, Jungwoo Joh | 2021-06-29 |
| 11011515 | Normally off III nitride transistor | Qhalid Fareed | 2021-05-18 |
| 10707324 | Group IIIA-N HEMT with a tunnel diode in the gate stack | Chang Soo Suh, Dong Seup Lee, Jungwoo Joh, Sameer Pendharkar | 2020-07-07 |
| 10680093 | HEMT having conduction barrier between drain fingertip and source | Jungwoo Joh, Chang Soo Suh, Sameer Pendharkar | 2020-06-09 |
| 10381456 | Group IIIA-N HEMT with a tunnel diode in the gate stack | Chang Soo Suh, Dong Seup Lee, Jungwoo Joh, Sameer Pendharkar | 2019-08-13 |
| 10229988 | Adaptive charge balanced edge termination | Deva Pattanayak | 2019-03-12 |
| 10026835 | Field boosted metal-oxide-semiconductor field effect transistor | Deva Pattanayak | 2018-07-17 |
| 9882041 | HEMT having conduction barrier between drain fingertip and source | Jungwoo Joh, Chang Soo Suh, Sameer Pendharkar | 2018-01-30 |
| 9865722 | Avalanche energy handling capable III-nitride transistors | Sameer Pendharkar | 2018-01-09 |
| 9853140 | Adaptive charge balanced MOSFET techniques | Deva Pattanayak | 2017-12-26 |
| 9842911 | Adaptive charge balanced edge termination | Deva Pattanayak | 2017-12-12 |
| 9741557 | Silicon nitride process for reduction of threshold shift | Nicholas Stephen Dellas, Dong Seup Lee | 2017-08-22 |
| 9685545 | Isolated III-N semiconductor devices | Sameer Pendharkar | 2017-06-20 |
| 9559093 | Method of forming a semiconductor device having a GaNFET, an overvoltage clamping component, and a voltage dropping component | Sameer Pendharkar | 2017-01-31 |
| 9553151 | III-nitride device and method having a gate isolating structure | Sameer Pendharkar, Jungwoo Joh | 2017-01-24 |
| 9543944 | Driver for normally on III-nitride transistors to get normally-off functionality | Sameer Pendharkar | 2017-01-10 |
| 9508596 | Processes used in fabricating a metal-insulator-semiconductor field effect transistor | Deva Pattanayak | 2016-11-29 |
| 9396948 | Layer transfer of silicon onto III-nitride material for heterogenous integration | Sameer Pendharkar, Rick L. Wise | 2016-07-19 |
| 9379022 | Process for forming driver for normally on III-nitride transistors to get normally-off functionality | Sameer Pendharkar | 2016-06-28 |
| 9356117 | Method for forming avalanche energy handling capable III-nitride transistors | Sameer Pendharkar | 2016-05-31 |
| 9196692 | Method to form stepped dielectric for field plate formation | Sameer Pendharkar | 2015-11-24 |
| 9093301 | Driver for normally on III-nitride transistors to get normally-off functionality | Sameer Pendharkar | 2015-07-28 |