Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7888196 | Trench isolation comprising process having multiple gate dielectric thicknesses and integrated circuits therefrom | Seetharaman Sridhar, Sameer Pendharkar | 2011-02-15 |
| 6804095 | Drain-extended MOS ESD protection structure | Keith E. Kunz, Charvaka Duvvury | 2004-10-12 |
| 6624487 | Drain-extended MOS ESD protection structure | Keith E. Kunz, Charvaka Duvvury | 2003-09-23 |
| 6620692 | Method of forming a metal oxide semiconductor transistor with self-aligned channel implant | David B. Scott | 2003-09-16 |
| 6548874 | Higher voltage transistors for sub micron CMOS processes | Alec J. Morton, Taylor R. Efland, Chin-Yu Tsai, Jozef Mitros, Sam Shichijo +1 more | 2003-04-15 |
| 6531355 | LDMOS device with self-aligned RESURF region and method of fabrication | Taylor R. Efland | 2003-03-11 |
| 6521946 | Electrostatic discharge resistant extended drain metal oxide semiconductor transistor | — | 2003-02-18 |
| 6483149 | LDMOS device with self-aligned resurf region and method of fabrication | Taylor R. Efland | 2002-11-19 |
| 6211552 | Resurf LDMOS device with deep drain region | Taylor R. Efland, Sameer Pendharkar, Peter Chia-cu Mei | 2001-04-03 |
| 5688337 | Temperature compensated photovoltaic array | — | 1997-11-18 |
| 5256582 | Method of forming complementary bipolar and MOS transistor having power and logic structures on the same integrated circuit substrate | Cornelia H. Blanton, Joe R. Trogolo, Larry Latham, David R. Cotton, Bob Todd | 1993-10-26 |
| 5181095 | Complementary bipolar and MOS transistor having power and logic structures on the same integrated circuit substrate | Larry Latham, Bob Todd, Cornelia H. Blanton, Joe R. Trogolo, David R. Cotton | 1993-01-19 |
| 5153697 | Integrated circuit that combines multi-epitaxial power transistors with logic/analog devices, and a process to produce same | Cornelia H. Blanton, Joe R. Trogolo, Larry Latham, David R. Cotton | 1992-10-06 |
| 5034337 | Method of making an integrated circuit that combines multi-epitaxial power transistors with logic/analog devices | Cornelia H. Blanton, Joe R. Trogolo, Larry Latham, David R. Cotton | 1991-07-23 |