Issued Patents All Time
Showing 1–25 of 25 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11387323 | Extended drain MOS with dual well isolation | Guruvayurappan Mathur | 2022-07-12 |
| 10756187 | Extended drain MOS with dual well isolation | Guruvayurappan Mathur | 2020-08-25 |
| 10505037 | P-channel DEMOS device | Imran Khan, Xiaoju Wu | 2019-12-10 |
| 9947783 | P-channel DEMOS device | Imran Khan, Xiaoju Wu | 2018-04-17 |
| 9608109 | N-channel demos device | Imran Khan, Shaoping Tang | 2017-03-28 |
| 6806541 | Field effect transistor with improved isolation structures | Lily Springer, Binghua Hu, Jozef Mitros | 2004-10-19 |
| 6784493 | Line self protecting multiple output power IC architecture | Taylor R. Efland, David Alexander Grant, Ramanathan Ramani, Dale J. Skelton, David D. Briggs | 2004-08-31 |
| 6770935 | Array of transistors with low voltage collector protection | Taylor R. Efland, David Alexander Grant, Ramanathan Ramani, Dale J. Skelton | 2004-08-03 |
| 6753202 | CMOS photodiode having reduced dark current and improved light sensitivity and responsivity | Zhiliang Chen, Kuok Ling, Hisashi Shichijo, Katsuo Komatsuzaki | 2004-06-22 |
| 6753575 | Tank-isolated-drain-extended power device | Taylor R. Efland | 2004-06-22 |
| 6730569 | Field effect transistor with improved isolation structures | Lily Springer, Binghua Hu, Jozef Mitros | 2004-05-04 |
| 6729886 | Method of fabricating a drain isolated LDMOS device | Taylor R. Efland | 2004-05-04 |
| 6710427 | Distributed power device with dual function minority carrier reduction | Taylor R. Efland, David Alexander Grant, Ramanathan Ramani, David D. Briggs, Dale J. Skelton | 2004-03-23 |
| 6709900 | Method of fabricating integrated system on a chip protection circuit | Taylor R. Efland, David Alexander Grant, Ramanathan Ramani, Dale J. Skelton, David D. Briggs | 2004-03-23 |
| 6680226 | Methods and devices for optimized digital and analog CMOS transistor performance in deep submicron technology | Taylor R. Efland, Alec J. Morton | 2004-01-20 |
| 6621064 | CMOS photodiode having reduced dark current and improved light sensitivity and responsivity | Zhiliang Chen, Kuok Ling, Hisashi Shichijo, Katsuo Komatsuzaki | 2003-09-16 |
| 6548874 | Higher voltage transistors for sub micron CMOS processes | Alec J. Morton, Taylor R. Efland, Jozef Mitros, Dan M. Mosher, Sam Shichijo +1 more | 2003-04-15 |
| 6512280 | Integrated CMOS structure for gate-controlled buried photodiode | Zhiliang Chen, Kuok Ling, Hisashi Shichijo, Katsuo Komatsuzaki | 2003-01-28 |
| 6468849 | Methods and devices for optimized digital and analog CMOS transistor performance in deep submicron technology | Taylor R. Efland, Alec J. Morton | 2002-10-22 |
| 6441431 | Lateral double diffused metal oxide semiconductor device | Taylor R. Efland, Sameer Pendharkar | 2002-08-27 |
| 6424005 | LDMOS power device with oversized dwell | Taylor R. Efland, Sameer Pendharkar, John P. Erdeljac, Jozef Mitros, Jeffrey P. Smith +1 more | 2002-07-23 |
| 6413824 | METHOD TO PARTIALLY OR COMPLETELY SUPPRESS POCKET IMPLANT IN SELECTIVE CIRCUIT ELEMENTS WITH NO ADDITIONAL MASK IN A CMOS FLOW WHERE SEPARATE MASKING STEPS ARE USED FOR THE DRAIN EXTENSION IMPLANTS FOR THE LOW VOLTAGE AND HIGH VOLTAGE TRANSISTORS | Amitava Chatterjee, Alec J. Morton, Mark S. Rodder, Taylor R. Efland, James R. Hellums | 2002-07-02 |
| 6392263 | Integrated structure for reduced leakage and improved fill-factor in CMOS pixel | Zhiliang Chen, Kuok Ling, Hisashi Shichijo, Katsuo Komatsuzaki | 2002-05-21 |
| 6274918 | Integrated circuit diode, and method for fabricating same | Taylor R. Efland | 2001-08-14 |
| 6137140 | Integrated SCR-LDMOS power device | Taylor R. Efland, Stephen C. Kwan, Kenneth G. Buss | 2000-10-24 |