Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Lily Springer — 17 Patents

TITexas Instruments: 17 patents #771 of 12,488Top 7%
Dallas, TX: #409 of 7,543 inventorsTop 6%
Texas: #8,472 of 125,132 inventorsTop 7%
Overall (All Time): #263,971 of 4,157,543Top 7%
17 Patents All Time
Lily Springer has been granted 17 US patents while listed as an inventor at Texas Instruments. The first was granted in 2004 and the most recent in January 2018. Lily Springer ranks #263,971 of 4,157,543 US inventors in our database (top 6.3%). Patent records list Lily Springer in Dallas, TX, US.

Patents per Year

Patents granted per year, 2004 to 2018Bar chart with a peak of 4 patents in 2004.peak 42004: 4 patents20042005: 3 patents20052007: 2 patents20072008: 1 patents20082009: 2 patents20092011: 1 patents20112012: 2 patents20122014: 1 patents20142018: 1 patents2018

Issued Patents All Time

Showing 1–17 of 17 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
9865584 Contact array optimization for ESD devices He Lin, Kun-Ming Chen, Chao-Wei Wu, Dening Wang, Andy Strachan +1 more 2018-01-09 $13,602,000
8664080 Vertical ESD protection device Toshiyuki Tani, Hiroshi Yamasaki, Kentaro Takahashi 2014-03-04 $8,083,000
8273623 Integrated high voltage capacitor having capacitance uniformity structures and a method of manufacture therefor David Leonard Larkin, Makoto Takemura, Ashish V. Gokhale, Dhaval A. Saraiya 2012-09-25 $11,577,000
8114731 Integrated high voltage capacitor having capacitance uniformity structures and a method of manufacture therefor David Leonard Larkin, Makoto Takemura, Ashish V. Gokhale, Dhaval A. Saraiya 2012-02-14 $7,128,000
7895554 Verification method with the implementation of well voltage pseudo diodes Wen-Hwa Chu, Shaibal Barua, James Garrett Homack 2011-02-22 $5,235,000
7615805 Versatile system for optimizing current gain in bipolar transistor structures Joe R. Trogolo, Tathagata Chatterjee, Jeffrey P. Smith 2009-11-10 $27,058,000
7562315 Edge recognition based high voltage pseudo layer verification methodology for mix signal design layout Haim Horovitz, Robert G. Shaw, Sameer Pendharkar, Wen-Hwa Chu, Paul C. Mannas 2009-07-14 $12,487,000
7470991 Integrated high voltage capacitor having capacitance uniformity structures and a method of manufacture therefor David Leonard Larkin, Makoto Takemura, Ashish V. Gokhale, Dhaval A. Saraiya 2008-12-30 $15,979,000
7226835 Versatile system for optimizing current gain in bipolar transistor structures Joe R. Trogolo, Tathagata Chatterlee, Jeff Smith 2007-06-05 $22,436,000
7164174 Single poly-emitter PNP using dwell diffusion in a BiCMOS technology 2007-01-16 $14,105,000
6958269 Memory device with reduced cell size Josef Czeslaw Mitros, Imran Khan 2005-10-25 $14,208,000
6949424 Single poly-emitter PNP using DWELL diffusion in a BiCMOS technology 2005-09-27 $31,528,000
6869851 Transistors formed with grid or island implantation masks to form reduced diffusion-depth regions without additional masks and process steps Joe R. Trogolo, Jeff Smith, Sheldon Douglas Haynie 2005-03-22 $18,900,000
6806541 Field effect transistor with improved isolation structures Binghua Hu, Chin-Yu Tsai, Jozef Mitros 2004-10-19 $15,318,000
6747308 Single poly EEPROM with reduced area Jozef Mitros, Roland Bucksch 2004-06-08 $19,033,000
6730569 Field effect transistor with improved isolation structures Binghua Hu, Chin-Yu Tsai, Jozef Mitros 2004-05-04 $10,969,000
6716709 Transistors formed with grid or island implantation masks to form reduced diffusion-depth regions without additional masks and process steps Jeff Smith, Sheldon Douglas Haynie, Joe R. Trogolo 2004-04-06 $28,865,000