Issued Patents All Time
Showing 25 most recent of 27 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9865584 | Contact array optimization for ESD devices | He Lin, Kun-Ming Chen, Chao-Wei Wu, Dening Wang, Lily Springer +1 more | 2018-01-09 |
| 7989883 | System and method for providing a poly cap and a no field oxide area to prevent formation of a vertical bird's beak structure in the manufacture of a semiconductor device | Charles A. Dark | 2011-08-02 |
| 7960998 | Electrical test structure and method for characterization of deep trench sidewall reliability | Lisa V. Rozario, Richard Orr | 2011-06-14 |
| 7867871 | System and method for increasing breakdown voltage of LOCOS isolated devices | Richard W. Foote, Terry Lines, Alexei Sadovnikov | 2011-01-11 |
| 7714355 | Method of controlling the breakdown voltage of BSCRs and BJT clamps | Vladislav Vashchenko, Alexei Sadovnikov, Peter J. Hopper | 2010-05-11 |
| 7507607 | Method of forming a silicide bridged anti-fuse with a tungsten plug metalization process | Charles A. Dark, William M. Coppock, Jeffery Lee Nilles | 2009-03-24 |
| 7488647 | System and method for providing a poly cap and a no field oxide area to prevent formation of a vertical bird's beak structure in the manufacture of a semiconductor device | Charles A. Dark | 2009-02-10 |
| 7479435 | Method of forming a circuit having subsurface conductors | Peter J. Hopper, Vladislav Vashchenko, Philipp Lindorfer | 2009-01-20 |
| 7298159 | Method of measuring the leakage current of a deep trench isolation structure | Lisa V. Rozario | 2007-11-20 |
| 7238553 | Method of forming a high-voltage silicon controlled rectifier structure with improved punch through resistance | Vladislav Vashchenko, Peter J. Hopper, Philipp Lindorfer | 2007-07-03 |
| 7214992 | Multi-source, multi-gate MOS transistor with a drain region that is wider than the source regions | Douglas Brisbin | 2007-05-08 |
| 7192857 | Method of forming a semiconductor structure with non-uniform metal widths | Peter J. Hopper, Philipp Lindorfer, Vladislav Vashchenko | 2007-03-20 |
| 7105373 | Vertical photodiode with heavily-doped regions of alternating conductivity types | Peter J. Hopper, Philipp Lindorfer, Vladislav Vashchenko | 2006-09-12 |
| 7037814 | Single mask control of doping levels | Vladislav Vashchenko, Peter J. Hopper, Philipp Lindorfer | 2006-05-02 |
| 6979879 | Trim zener using double poly process | Wipawan Yindeepol | 2005-12-27 |
| 6946706 | LDMOS transistor structure for improving hot carrier reliability | Douglas Brisbin, David Tsuei, Alexander H. Owens | 2005-09-20 |
| 6933562 | Power transistor structure with non-uniform metal widths | Peter J. Hopper, Philipp Lindorfer, Vladislav Vashchenko | 2005-08-23 |
| 6919588 | High-voltage silicon controlled rectifier structure with improved punch through resistance | Vladislav Vashchenko, Peter J. Hopper, Philipp Lindorfer | 2005-07-19 |
| 6864582 | Semiconductor interconnect and method of providing interconnect using a contact region | Vladislav Vashchenko, Peter J. Hopper, Philipp Lindorfer, Peter Johnson | 2005-03-08 |
| 6844585 | Circuit and method of forming the circuit having subsurface conductors | Peter J. Hopper, Vladislav Vashchenko, Philipp Lindorfer | 2005-01-18 |
| 6815797 | Silicide bridged anti-fuse | Charles A. Dark, William M. Coppock, Jeffery Lee Nilles | 2004-11-09 |
| 6806529 | Memory cell with a capacitive structure as a control gate and method of forming the memory cell | Peter J. Hopper, Yuri Mirgorodski | 2004-10-19 |
| 6727547 | Method and device for improving hot carrier reliability of an LDMOS transistor using drain ring over-drive bias | Douglas Brisbin | 2004-04-27 |
| 6639784 | Wedge-shaped high density capacitor and method of making the capacitor | Peter J. Hopper, Philipp Lindorfer, Kyuwoon Hwang, Vladislav Vashchenko | 2003-10-28 |
| 6586317 | Method of forming a zener diode in a npn and pnp bipolar process flow that requires no additional steps to set the breakdown voltage | Vladislav Vashchenko, Peter J. Hopper | 2003-07-01 |