Issued Patents All Time
Showing 201–225 of 231 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7208386 | Drain extended MOS transistor with improved breakdown robustness | — | 2007-04-24 |
| 7195965 | Premature breakdown in submicron device geometries | John Lin, Philip L. Hower, Taylor R. Efland, Vladimir Bolkhovsky | 2007-03-27 |
| 7187034 | Distributed power MOSFET | Philip L. Hower, John Lin, Steven L. Merchant | 2007-03-06 |
| 7187033 | Drain-extended MOS transistors with diode clamp and methods for making the same | — | 2007-03-06 |
| 7176091 | Drain-extended MOS transistors and methods for making the same | — | 2007-02-13 |
| 7135373 | Reduction of channel hot carrier effects in transistor devices | Pinghai Hao, Shanjen Pan | 2006-11-14 |
| 7135759 | Individualized low parasitic power distribution lines deposited over active integrated circuits | Taylor R. Efland, Milton L. Buschbom | 2006-11-14 |
| 7122862 | Reduction of channel hot carrier effects in transistor devices | Pinghai Hao, Shanjen Pan | 2006-10-17 |
| 7112480 | Method and structure for a low voltage CMOS integrated circuit incorporating higher-voltage devices | Shanjen Pan, James Robert Todd | 2006-09-26 |
| 7045903 | Integrated power circuits with distributed bonding and current flow | Taylor R. Efland | 2006-05-16 |
| 7005354 | Depletion drain-extended MOS transistors and methods for making the same | Shanjen Pan, James Robert Todd, Tsutomu Kubota, Pinghai Hao | 2006-02-28 |
| 6969901 | Method and structure for a low voltage CMOS integrated circuit incorporating higher-voltage devices | Shanjen Pan, James Robert Todd | 2005-11-29 |
| 6960807 | Drain extend MOS transistor with improved breakdown robustness | — | 2005-11-01 |
| 6919603 | Efficient protection structure for reverse pin-to-pin electrostatic discharge | Jonathan Brodsky, Robert Steinhoff | 2005-07-19 |
| 6908859 | Low leakage power transistor and method of forming | Taylor R. Efland, William Nehrer | 2005-06-21 |
| 6884686 | Method of manufacturing and structure of semiconductor device with floating ring structure | — | 2005-04-26 |
| 6878999 | Transistor with improved safe operating area | Philip L. Hower, John Lin, Steven L. Jensen | 2005-04-12 |
| 6867100 | System for high-precision double-diffused MOS transistors | Henry Litzmann Edwards, Joe R. Trogolo, Tathagata Chatterjee, Taylor R. Efland | 2005-03-15 |
| 6815757 | Single-poly EEPROM on a negatively biased substrate | Reed W. Adams, William E. Grose, Roland Bucksch | 2004-11-09 |
| 6815276 | Segmented power MOSFET of safe operation | Philip L. Hower, John Lin, Steven L. Merchant | 2004-11-09 |
| 6800917 | Bladed silicon-on-insulator semiconductor devices and method of making | Sheldon Douglas Haynie, Steven L. Merchant, Vladimir Bolkhovsky | 2004-10-05 |
| 6797547 | Bladed silicon-on-insulator semiconductor devices and method of making | Sheldon Douglas Haynie, Steven L. Merchant, Vladimir Bolkhovsky | 2004-09-28 |
| 6670685 | Method of manufacturing and structure of semiconductor device with floating ring structure | — | 2003-12-30 |
| 6624481 | ESD robust bipolar transistor with high variable trigger and sustaining voltages | Philip L. Hower, Robert Steinhoff | 2003-09-23 |
| 6468837 | Reduced surface field device having an extended field plate and method for forming the same | Taylor R. Efland | 2002-10-22 |