Issued Patents All Time
Showing 51–75 of 231 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10211335 | LDMOS transistor with segmented gate dielectric layer | Ming-Yeh Chuang | 2019-02-19 |
| 10205001 | Hybrid active-field gap extended drain MOS transistor | John Lin | 2019-02-12 |
| 10192799 | Method and apparatus to model and monitor time dependent dielectric breakdown in multi-field plate gallium nitride devices | Dong Seup Lee, Jungwoo Joh | 2019-01-29 |
| 10186589 | Transistor with source field plates under gate runner layers | Hiroyuki Tomomatsu, Hiroshi Yamasaki | 2019-01-22 |
| 10163678 | Sinker with a reduced width | Binghua Hu, Guru Mathur, Takehito Tamura | 2018-12-25 |
| 10134830 | Integrated trench capacitor | Binghua Hu, Hideaki Kawahara | 2018-11-20 |
| 10134596 | Recessed solid state apparatuses | Dong Seup Lee, Yoshikazu Kondo, Pinghai Hao | 2018-11-20 |
| 10121891 | P-N bimodal transistors | Yongxi Zhang, Henry Litzmann Edwards | 2018-11-06 |
| 10103258 | Laterally diffused metal oxide semiconductor with gate poly contact within source window | Guru Mathur | 2018-10-16 |
| 10101382 | Systems and methods for dynamic Rdson measurement | Alex Paikin, Colin Johnson, Tathagata Chatterjee | 2018-10-16 |
| 10062777 | Trench gate trench field plate vertical MOSFET | Marie Denison, Guru Mathur | 2018-08-28 |
| 10014231 | Method and apparatus to model and monitor time dependent dielectric breakdown in multi-field plate gallium nitride devices | Dong Seup Lee, Jungwoo Joh | 2018-07-03 |
| 9985095 | Lateral MOSFET with buried drain extension layer | Marie Denison, Philip L. Hower | 2018-05-29 |
| 9985028 | Diluted drift layer with variable stripe widths for power transistors | Yongxi Zhang, Scott Balster | 2018-05-29 |
| 9947784 | High voltage lateral extended drain MOS transistor with improved drift layer contact | Philip L. Hower, Marie Denison | 2018-04-17 |
| 9941383 | Fast switching IGBT with embedded emitter shorting contacts and method for making same | Jacek Korec, John Manning Savidge Neilson | 2018-04-10 |
| 9899484 | Transistor with source field plates under gate runner layers | Hiroyuki Tomomatsu, Hiroshi Yamasaki | 2018-02-20 |
| 9882041 | HEMT having conduction barrier between drain fingertip and source | Jungwoo Joh, Naveen Tipirneni, Chang Soo Suh | 2018-01-30 |
| 9876071 | Structures to avoid floating RESURF layer in high voltage lateral devices | Yongxi Zhang, Philip L. Hower, John Lin, Guru Mathur, Scott Balster +2 more | 2018-01-23 |
| 9865729 | Laterally diffused metal oxide semiconductor with segmented gate oxide | Ming-Yeh Chuang | 2018-01-09 |
| 9865722 | Avalanche energy handling capable III-nitride transistors | Naveen Tipirneni | 2018-01-09 |
| 9865691 | Poly sandwich for deep trench fill | Binghua Hu, Jarvis Benjamin Jacobs | 2018-01-09 |
| 9865507 | Low-cost CMOS structure with dual gate dielectrics and method of forming the CMOS structure | Pinghai Hao, Amitava Chatterjee | 2018-01-09 |
| 9843322 | Integrated high-side driver for P-N bimodal power device | Yongxi Zhang, Philip L. Hower, Salvatore Giombanco, Filippo Marino, Seetharaman Sridhar | 2017-12-12 |
| 9831320 | High voltage lateral DMOS transistor with optimized source-side blocking capability | Philip L. Hower, Marie Denison | 2017-11-28 |