Issued Patents All Time
Showing 76–100 of 104 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6306725 | In-situ liner for isolation trench side walls and method | Somnath Nag | 2001-10-23 |
| 6307230 | Transistor having an improved sidewall gate structure and method of construction | Wei William Lee, Greg Hames, Quzhi He, Iqbal Ali, Maureen A. Hanratty | 2001-10-23 |
| 6303420 | Integrated bipolar junction transistor for mixed signal circuits | Seetharaman Sridhar, Hisashi Shichijo, Alec J. Morton | 2001-10-16 |
| 6297125 | Air-bridge integration scheme for reducing interconnect delay | Somnath Nag, Girish Dixit | 2001-10-02 |
| 6287920 | Method of making multiple threshold voltage integrated of circuit transistors | Mahalingam Nandakumar | 2001-09-11 |
| 6232188 | CMP-free disposable gate process | Suhail Murtaza | 2001-05-15 |
| 6228725 | Semiconductor devices with pocket implant and counter doping | Mahalingam Nandakumar, Mark S. Rodder, Ih-Chin Chen | 2001-05-08 |
| 6180978 | Disposable gate/replacement gate MOSFETs for sub-0.1 micron gate length and ultra-shallow junctions | Richard A. Chapman, Syed Suhail Murtaza | 2001-01-30 |
| 6143625 | Protective liner for isolation trench side walls and method | Ih-Chin Chen, Somnath Nag | 2000-11-07 |
| 6127232 | Disposable gate/replacement gate MOSFETS for sub-0.1 micron gate length and ultra-shallow junctions | Richard A. Chapman, Syed Suhail Murtaza | 2000-10-03 |
| 6125021 | Semiconductor ESD protection circuit | Charvaka Duvvury, Steven E. Marum | 2000-09-26 |
| 6117741 | Method of forming a transistor having an improved sidewall gate structure | Wei William Lee, Greg Hames, Quzhi He, Iqbal Ali, Maureen A. Hanratty | 2000-09-12 |
| 6114186 | Hydrogen silsesquioxane thin films for low capacitance structures in integrated circuits | Shin-Puu Jeng, Kelly Taylor | 2000-09-05 |
| 6081002 | Lateral SCR structure for ESD protection in trench isolated technologies | E. Ajith Amerasekera, Bernhard H. Andresen | 2000-06-27 |
| 6015992 | Bistable SCR-like switch for ESD protection of silicon-on-insulator integrated circuits | Ekanayake A. Amerasekera | 2000-01-18 |
| 5917219 | Semiconductor devices with pocket implant and counter doping | Mahalingam Nandakumar, Mark S. Rodder, Ih-Chin Chen | 1999-06-29 |
| 5909628 | Reducing non-uniformity in a refill layer thickness for a semiconductor device | Theodore W. Houston, Ih-Chin Chen, Agerico L. Esquirel, Somnath Nag, Iqbal Ali +4 more | 1999-06-01 |
| 5907462 | Gate coupled SCR for ESD protection circuits | Charvaka Duvvury, Ping Yang, Ekanayake A. Amerasekera | 1999-05-25 |
| 5822241 | DRAM pass transistors | Purnendu K. Mozumder | 1998-10-13 |
| 5607867 | Method of forming a controlled low collector breakdown voltage transistor for ESD protection circuits | Ajith Amerasekera | 1997-03-04 |
| 5548548 | Pass transistor for a 256 megabit dram with negatively biased substrate | Jiann Liu, Purnendu K. Mozumder, Mark S. Rodder, Ih-Chin Chen | 1996-08-20 |
| 5539233 | Controlled low collector breakdown voltage vertical transistor for ESD protection circuits | Ajith Amerasekera | 1996-07-23 |
| 5517051 | Silicon controlled rectifier structure for electrostatic discharge protection | — | 1996-05-14 |
| 5465189 | Low voltage triggering semiconductor controlled rectifiers | Thomas L. Polgreen, Ping Yang | 1995-11-07 |
| 5453384 | Method of making a silicon controlled rectifier device for electrostatic discharge protection | — | 1995-09-26 |