Issued Patents All Time
Showing 26–50 of 105 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11239279 | Resistive switching random access memory with asymmetric source and drain | Chin-Chieh Yang, Hsia-Wei Chen, Chih-Yang Chang, Kuo-Chi Tu, Wen-Ting Chu | 2022-02-01 |
| 11201190 | RRAM memory cell with multiple filaments | Chin-Chieh Yang, Chih-Yang Chang, Wen-Ting Chu | 2021-12-14 |
| 11201281 | Method for forming a flat bottom electrode via (BEVA) top surface for memory | Hsia-Wei Chen, Chih-Yang Chang, Chin-Chieh Yang, Jen-Sheng Yang, Sheng-Hung Shih +3 more | 2021-12-14 |
| 11107982 | RRAM structure | Chieh-Fei Chiu, Wen-Ting Chu, Yong-Shiuan Tsair, Chin-Yu Mei, Po-Hao Tseng | 2021-08-31 |
| 11094744 | Interconnect landing method for RRAM technology | Hsia-Wei Chen, Chih-Yang Chang, Chin-Chieh Yang, Jen-Sheng Yang, Kuo-Chi Tu +1 more | 2021-08-17 |
| 11038108 | Step height mitigation in resistive random access memory structures | Wei-Ming Wang, Chia-Wei Liu, Jen-Sheng Yang, Wen-Ting Chu, Huei-Tzu Wang | 2021-06-15 |
| 11037989 | Method to form memory cells separated by a void-free dielectric structure | Hsia-Wei Chen, Wen-Ting Chu | 2021-06-15 |
| 11037990 | Method to form memory cells separated by a void-free dielectric structure | Hsia-Wei Chen, Wen-Ting Chu | 2021-06-15 |
| 10903274 | Interconnect landing method for RRAM technology | Hsia-Wei Chen, Chih-Yang Chang, Chin-Chieh Yang, Jen-Sheng Yang, Kuo-Chi Tu +1 more | 2021-01-26 |
| 10868250 | Resistance variable memory structure and method of forming the same | Kuo-Chi Tu, Chih-Yang Chang, Hsia-Wei Chen, Chin-Chieh Yang, Sheng-Hung Shih +2 more | 2020-12-15 |
| 10862029 | Top electrode for device structures in interconnect | Hsia-Wei Chen, Wen-Ting Chu, Kuo-Chi Tu, Chih-Yang Chang, Chin-Chieh Yang +2 more | 2020-12-08 |
| 10763426 | Method for forming a flat bottom electrode via (BEVA) top surface for memory | Hsia-Wei Chen, Chih-Yang Chang, Chin-Chieh Yang, Jen-Sheng Yang, Sheng-Hung Shih +3 more | 2020-09-01 |
| 10749108 | Logic compatible RRAM structure and process | Chih-Yang Chang, Hsia-Wei Chen, Chin-Chieh Yang, Kuo-Chi Tu, Wen-Ting Chu | 2020-08-18 |
| 10714536 | Method to form memory cells separated by a void-free dielectric structure | Hsia-Wei Chen, Wen-Ting Chu | 2020-07-14 |
| 10700275 | RRAM cell structure with laterally offset BEVA/TEVA | Chih-Yang Chang, Wen-Ting Chu, Kuo-Chi Tu, Hsia-Wei Chen, Chin-Chieh Yang +2 more | 2020-06-30 |
| 10686125 | Memory device | Harry-Hak-Lay Chuang, Hung Cho Wang, Tong-Chern Ong, Wen-Ting Chu, Kuei-Hung Shen +2 more | 2020-06-16 |
| 10680038 | RRAM memory cell with multiple filaments | Chin-Chieh Yang, Chih-Yang Chang, Wen-Ting Chu | 2020-06-09 |
| 10566387 | Interconnect landing method for RRAM technology | Hsia-Wei Chen, Chih-Yang Chang, Chin-Chieh Yang, Jen-Sheng Yang, Kuo-Chi Tu +1 more | 2020-02-18 |
| 10566519 | Method for forming a flat bottom electrode via (BEVA) top surface for memory | Hsia-Wei Chen, Chih-Yang Chang, Chin-Chieh Yang, Jen-Sheng Yang, Sheng-Hung Shih +3 more | 2020-02-18 |
| 10529658 | Method for forming a homogeneous bottom electrode via (BEVA) top surface for memory | Hsia-Wei Chen, Wen-Ting Chu | 2020-01-07 |
| 10510953 | Top electrode for device structures in interconnect | Hsia-Wei Chen, Wen-Ting Chu, Kuo-Chi Tu, Chih-Yang Chang, Chin-Chieh Yang +2 more | 2019-12-17 |
| 10504963 | RRAM memory cell with multiple filaments | Chin-Chieh Yang, Chih-Yang Chang, Wen-Ting Chu | 2019-12-10 |
| 10483322 | Memory device and method for fabricating the same | Ching-Pei Hsieh, Hsia-Wei Chen | 2019-11-19 |
| 10475852 | Resistive switching random access memory with asymmetric source and drain | Chin-Chieh Yang, Hsia-Wei Chen, Chih-Yang Chang, Kuo-Chi Tu, Wen-Ting Chu | 2019-11-12 |
| 10388865 | High yield RRAM cell with optimized film scheme | Trinh Hai Dang, Hsing-Lien Lin, Cheng-Yuan Tsai, Chin-Chieh Yang, Wen-Ting Chu +1 more | 2019-08-20 |