Issued Patents All Time
Showing 51–75 of 105 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10388865 | High yield RRAM cell with optimized film scheme | Trinh Hai Dang, Hsing-Lien Lin, Cheng-Yuan Tsai, Chin-Chieh Yang, Wen-Ting Chu +1 more | 2019-08-20 |
| 10276485 | Method for forming a homogeneous bottom electrode via (BEVA) top surface for memory | Hsia-Wei Chen, Wen-Ting Chu | 2019-04-30 |
| 10276790 | Top electrode for device structures in interconnect | Hsia-Wei Chen, Wen-Ting Chu, Kuo-Chi Tu, Chih-Yang Chang, Chin-Chieh Yang +2 more | 2019-04-30 |
| 10199575 | RRAM cell structure with laterally offset BEVA/TEVA | Chih-Yang Chang, Wen-Ting Chu, Kuo-Chi Tu, Hsia-Wei Chen, Chin-Chieh Yang +2 more | 2019-02-05 |
| 10163981 | Metal landing method for RRAM technology | Hsia-Wei Chen, Chih-Yang Chang, Chin-Chieh Yang, Jen-Sheng Yang, Kuo-Chi Tu +1 more | 2018-12-25 |
| 10164169 | Memory device having a single bottom electrode layer | Harry-Hak-Lay Chuang, Hung Cho Wang, Tong-Chern Ong, Wen-Ting Chu, Kuei-Hung Shen +2 more | 2018-12-25 |
| 10164185 | RRAM cell with PMOS access transistor | Sheng-Hung Shih, Kuo-Chi Tu, Chih-Yang Chang, Hsia-Wei Chen, Chin-Chieh Yang +2 more | 2018-12-25 |
| 10158070 | Logic compatible RRAM structure and process | Chih-Yang Chang, Hsia-Wei Chen, Chin-Chieh Yang, Kuo-Chi Tu, Wen-Ting Chu | 2018-12-18 |
| 10158072 | Step height reduction of memory element | Jen-Sheng Yang, Wen-Ting Chu, Chih-Yang Chang, Chin-Chieh Yang, Kuo-Chi Tu +3 more | 2018-12-18 |
| 10109793 | Bottom electrode for RRAM structure | Jen-Sheng Yang, Wen-Ting Chu | 2018-10-23 |
| 10103330 | Resistance variable memory structure | Kuo-Chi Tu, Chih-Yang Chang, Hsia-Wei Chen, Chin-Chieh Yang, Wen-Ting Chu | 2018-10-16 |
| 10103200 | Resistive switching random access memory with asymmetric source and drain | Chin-Chieh Yang, Hsia-Wei Chen, Chih-Yang Chang, Kuo-Chi Tu, Wen-Ting Chu | 2018-10-16 |
| 10050197 | Resistance variable memory structure | Kuo-Chi Tu, Chih-Yang Chang, Hsia-Wei Chen, Chin-Chieh Yang, Wen-Ting Chu | 2018-08-14 |
| 10038139 | One transistor and one resistive random access memory (RRAM) structure with spacer | Hsia-Wei Chen, Wen-Ting Chu, Kuo-Chi Tu, Chin-Chieh Yang, Chih-Yang Chang | 2018-07-31 |
| 10008662 | Perpendicular magnetic tunneling junction (MTJ) for improved magnetoresistive random-access memory (MRAM) process | Wen-Chun You, Kuo-Chi Tu, Chih-Yang Chang, Hsia-Wei Chen, Chin-Chieh Yang +2 more | 2018-06-26 |
| 9941470 | RRAM device with data storage layer having increased height | Jen-Sheng Yang, Chih-Yang Chang, Chin-Chieh Yang, Kuo-Chi Tu, Sheng-Hung Shih +2 more | 2018-04-10 |
| 9876167 | High yield RRAM cell with optimized film scheme | Trinh Hai Dang, Hsing-Lien Lin, Cheng-Yuan Tsai, Chin-Chieh Yang, Wen-Ting Chu +1 more | 2018-01-23 |
| 9853213 | Logic compatible RRAM structure and process | Chih-Yang Chang, Hsia-Wei Chen, Chin-Chieh Yang, Kuo-Chi Tu, Wen-Ting Chu | 2017-12-26 |
| 9818938 | Method of forming a semiconductor structure | Kuo-Chi Tu, Chih-Yang Chang, Hsia-Wei Chen, Chin-Chieh Yang, Wen-Ting Chu | 2017-11-14 |
| 9780145 | Resistive random access memory (RRAM) structure | Chih-Yang Chang, Wen-Ting Chu, Kuo-Chi Tu, Hsia-Wei Chen, Chin-Chieh Yang | 2017-10-03 |
| 9780302 | Top electrode for device structures in interconnect | Hsia-Wei Chen, Wen-Ting Chu, Kuo-Chi Tu, Chih-Yang Chang, Chin-Chieh Yang +2 more | 2017-10-03 |
| 9773552 | RRAM cell with PMOS access transistor | Sheng-Hung Shih, Kuo-Chi Tu, Chih-Yang Chang, Hsia-Wei Chen, Chin-Chieh Yang +2 more | 2017-09-26 |
| 9673391 | Resistance variable memory structure and method of forming the same | Kuo-Chi Tu, Chih-Yang Chang, Hsia-Wei Chen, Chin-Chieh Yang, Wen-Ting Chu | 2017-06-06 |
| 9577009 | RRAM cell with PMOS access transistor | Sheng-Hung Shih, Kuo-Chi Tu, Chih-Yang Chang, Hsia-Wei Chen, Chin-Chieh Yang +2 more | 2017-02-21 |
| 9553265 | RRAM device with data storage layer having increased height | Jen-Sheng Yang, Chih-Yang Chang, Chin-Chieh Yang, Kuo-Chi Tu, Sheng-Hung Shih +2 more | 2017-01-24 |