Issued Patents All Time
Showing 201–225 of 260 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9336859 | Memory array | Tzu-Kuei Lin, Hung-Jen Liao, Jhon Jhy Liaw | 2016-05-10 |
| 9318190 | Memory device | Tzu-Kuei Lin, Hung-Jen Liao | 2016-04-19 |
| 9281056 | Static random access memory and method of using the same | Wei-Cheng Wu, Wei Min Chan, Hung-Jen Liao, Ping-Wei Wang | 2016-03-08 |
| 9275710 | Three dimensional cross-access dual-port bit cell design | Wei Min Chan, Kao-Cheng Lin | 2016-03-01 |
| 9257172 | Multi-port memory cell | Hidehiro Fujiwara, Kao-Cheng Lin, Hung-Jen Liao | 2016-02-09 |
| 9208858 | Static random access memory with assist circuit | Kao-Cheng Lin, Hidehiro Fujiwara, Wei Min Chan | 2015-12-08 |
| 9208854 | Three dimensional dual-port bit cell and method of assembling same | Tzu-Kuei Lin, Hung-Jen Liao | 2015-12-08 |
| 9202557 | Three-dimensional two-port bit cell | Li-Wen Wang | 2015-12-01 |
| 9183341 | Pre-colored methodology of multiple patterning | Hung-Jen Liao, Jonathan Tsung-Yung Chang | 2015-11-10 |
| 9171849 | Three dimensional dual-port bit cell and method of using same | Wei Min Chan, Wei-Cheng Wu | 2015-10-27 |
| 9165623 | Memory arrangement | Wei-Cheng Wu, Hung-Jen Liao | 2015-10-20 |
| 9142275 | Wordline tracking for boosted-wordline timing scheme | Li-Wen Wang, Chih-Yu Lin, Hung-Jen Liao | 2015-09-22 |
| 9135971 | Boosted read write word line | Chih-Yu Lin, Li-Wen Wang, Hung-Jen Liao, Jonathan Tsung-Yung Chang | 2015-09-15 |
| 9129707 | Dual port SRAM with dummy read recovery | Kao-Cheng Lin, Wei Min Chan | 2015-09-08 |
| 9105326 | Memory device and method for writing therefor | Li-Wen Wang, Chih-Yu Lin | 2015-08-11 |
| 9099199 | Memory cell and memory array | Tzu-Kuei Lin, Hung-Jen Liao, Jhon Jhy Liaw | 2015-08-04 |
| 9093176 | Power line lowering for write assisted control scheme | Wei-Cheng Wu, Wei Min Chan, Hung-Jen Liao | 2015-07-28 |
| 9075936 | Pre-colored methodology of multiple patterning | Wei Min Chan, Hung-Jen Liao, Jonathan Tsung-Yung Chang | 2015-07-07 |
| 9064799 | Method of forming edge devices for improved performance | Jung-Hsuan Chen, Shao-Yu Chou, Hung-Jen Liao, Li-Chun Tien | 2015-06-23 |
| 9041069 | Distributed metal routing | You-Cheng Xiao, Jung-Hsuan Chen, Shao-Yu Chou, Li-Chun Tien, Hung-Jen Liao | 2015-05-26 |
| 8947953 | Bit cell internal voltage control | Wei Min Chan, Yi-Tzu Chen, Wei-Cheng Wu, Hau-Tai Shieh | 2015-02-03 |
| 8928113 | Layout scheme and method for forming device cells in semiconductor devices | Hsien-Yu Pan, Jung-Hsuan Chen, Shao-Yu Chou, Hung-Jen Liao | 2015-01-06 |
| 8773930 | Built-in test circuit and method | Tzu-Kuei Lin, Hung-Jen Liao, Fang Jao | 2014-07-08 |
| 8773923 | Memory device and method for writing therefor | Li-Wen Wang, Chih-Yu Lin | 2014-07-08 |
| 8767493 | SRAM differential voltage sensing apparatus | Kun-Hsi Li, Shao-Yu Chou, Hung-Jen Liao, Wei Min Chan | 2014-07-01 |