Issued Patents All Time
Showing 176–200 of 364 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11007005 | Method of manufacturing a semiconductor device and a semiconductor device | Tung Ying Lee, Ziwei Fang, Meng-Hsuan Hsiao | 2021-05-18 |
| 10978344 | Melting laser anneal of epitaxy regions | Su-Hao Liu, Wen-Yen Chen, Tz-Shian Chen, Cheng-Jung Sung, Li-Ting Wang +3 more | 2021-04-13 |
| 10937783 | Semiconductor device and manufacturing method thereof | Chia-Wen Chang, Hong-Nien Lin, Chien-Hsing Lee, Chih-Sheng Chang, Ling-Yen Yeh +1 more | 2021-03-02 |
| 10930782 | Method for forming a semiconductor device including a stacked wire structure | Cheng-Hsien Wu, Chih Chieh Yeh | 2021-02-23 |
| 10886268 | Method of manufacturing a semiconductor device with separated merged source/drain structure | Tung Ying Lee, Chih Chieh Yeh, Tsung-Lin Lee, Meng-Hsuan Hsiao | 2021-01-05 |
| 10879117 | Replacement contacts | Teng-Chun Tsai, Yasutoshi Okuno | 2020-12-29 |
| 10868140 | Gap-filling germanium through selective bottom-up growth | De-Wei Yu, Chien-Hao Chen, Ziwei Fang | 2020-12-15 |
| 10867841 | Semiconductor device and method of manufacturing the same | Meng-Hsuan Hsiao, Tung Ying Lee, Chih Chieh Yeh | 2020-12-15 |
| 10867859 | Methods of fabricating semiconductor devices having isolation structures with liners | Hsueh-Ju Chen, Xiong-Fei Yu, Chi On Chui, Huicheng Chang | 2020-12-15 |
| 10861937 | Integrated circuit structure and method with solid phase diffusion | Cheng-Yi Peng, Ling-Yen Yeh, Chi-Wen Liu, Chih-Sheng Chang | 2020-12-08 |
| 10861751 | Method of semiconductor integrated circuit fabrication | De-Wei Yu, Chia Ping Lo, Liang-Gi Yao, Weng Chang, Ziwei Fang | 2020-12-08 |
| 10854605 | Replacement gate process for FinFET | Hung-Li Chiang, Cheng-Yi Peng, Tsung-Yao Wen, Yen-Ming Chen | 2020-12-01 |
| 10825907 | Self-aligned contact and manufacturing method thereof | Tung Ying Lee, Chih Chieh Yeh, Jeng-Ya David Yeh, Yuan-Hung Chiu, Chi-Wen Liu | 2020-11-03 |
| 10818754 | Semiconductor device with silicided source/drain region | Chien-Chao Huang, Chao-Hsiung Wang, Chun-Chieh Lin, Chenming Hu | 2020-10-27 |
| 10818780 | Devices having a semiconductor material that is semimetal in bulk and methods of forming the same | Jean-Pierre Colinge, Carlos H. Diaz | 2020-10-27 |
| 10804268 | Vertical gate semiconductor device with steep subthreshold slope | Hung-Li Chiang, Szu-Wei Huang, Chih Chieh Yeh | 2020-10-13 |
| 10741646 | Field-effect transistors having contacts to 2D material active region | Ling-Yen Yeh, Chi-Wen Liu | 2020-08-11 |
| 10727110 | Semiconductor device and method of manufacturing the same | Meng-Hsuan Hsiao, Tung Ying Lee, Chih Chieh Yeh | 2020-07-28 |
| 10727298 | Strained nanowire CMOS device and method of forming | Cheng-Yi Peng, Hung-Li Chiang, Yu-Lin Yang, Chih Chieh Yeh, Chi-Wen Liu | 2020-07-28 |
| 10707334 | Reduction of fin loss in the formation of FinFETs | Chi On Chui | 2020-07-07 |
| 10658234 | Formation method of interconnection structure of semiconductor device | Min-Hsiu Hung, Sung-Li Wang, Pei-Wen Wu, Yida Li, Chih-Wei Chang +4 more | 2020-05-19 |
| 10644168 | 2-D material transistor with vertical structure | Jean-Pierre Colinge, Chung-Cheng Wu, Carlos H. Diaz, Chih-Hao Wang, Ken-Ichi Goto +3 more | 2020-05-05 |
| 10593775 | Semiconductor device and manufacturing method thereof | Sung-Li Wang, Chi On Chui, Jyh-Cherng Sheu, Hung-Li Chiang, I-Sheng Chen | 2020-03-17 |
| 10535732 | Strained nanowire CMOS device and method of forming | Cheng-Yi Peng, Hung-Li Chiang, Yu-Lin Yang, Chih Chieh Yeh, Chi-Wen Liu | 2020-01-14 |
| 10522625 | Multi-gate device and method of fabrication thereof | I-Sheng Chen, Cheng-Hsien Wu, Chih Chieh Yeh | 2019-12-31 |