Issued Patents All Time
Showing 251–275 of 364 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9620627 | Field-effect transistors having black phosphorus channel and methods of making the same | Ling-Yen Yeh | 2017-04-11 |
| 9614086 | Conformal source and drain contacts for multi-gate field effect transistors | Carlos H. Diaz, Chih-Hao Wang, Ling-Yen Yeh, Yuan-Chen Sun | 2017-04-04 |
| 9576950 | Contacts to transition metal dichalcogenide and manufacturing methods thereof | Ling-Yen Yeh | 2017-02-21 |
| 9570580 | Replacement gate process for FinFET | Hung-Li Chiang, Cheng-Yi Peng, Tsung-Yao Wen, Yen-Ming Chen | 2017-02-14 |
| 9564493 | Devices having a semiconductor material that is semimetal in bulk and methods of forming the same | Jean-Pierre Colinge, Carlos H. Diaz | 2017-02-07 |
| 9564489 | Multiple gate field-effect transistors having oxygen-scavenged gate stack | Chih Chieh Yeh, Chih-Hsin Ko, Cheng-Hsien Wu, Liang-Yin Chen, Xiong-Fei Yu +2 more | 2017-02-07 |
| 9564317 | Method of forming a nanowire | Blandine Duriez, Martin Christopher Holland | 2017-02-07 |
| 9558942 | High density nanowire array | Blandine Duriez, Martin Christopher Holland | 2017-01-31 |
| 9515071 | Asymmetric source/drain depths | Cheng-Yi Peng, Yu-Lin Yang, Chia-Cheng Ho, Jung-Piao Chiu, Tsung-Lin Lee +2 more | 2016-12-06 |
| 9472669 | Semiconductor Fin FET device with epitaxial source/drain | Hung-Li Chiang, Cheng-Yi Peng, Jyh-Cherng Sheu | 2016-10-18 |
| 9391078 | Method and structure for finFET devices | CheeWee Liu, Wen-Hsien Tu, Shih-Hsien Huang, Cheng-Yi Peng, Chih-Sheng Chang | 2016-07-12 |
| 8933435 | Tunneling transistor | Kian Hui Goh, Eng Huat Toh | 2015-01-13 |
| 8790970 | Doping of semiconductor fin devices | Ping-Wei Wang, Hao Chen, Fu-Liang Yang, Chenming Hu | 2014-07-29 |
| 8569146 | Isolation structure for strained channel transistors | Chih-Hsin Ko, Wen-Chin Lee, Chung-Hu Ge | 2013-10-29 |
| 8564018 | Relaxed silicon germanium substrate with low defect density | Chun Chich Lin, Chien-Chao Huang, Chao-Hsiung Wang, Tien-Chih Chang, Chenming Hu +4 more | 2013-10-22 |
| 8541767 | Memory component having an electrical contact free of a metal layer | Weiwei Lina Fang, Rong Zhao, Luping Shi | 2013-09-24 |
| 8488102 | Immersion fluid for immersion lithography, and method of performing immersion lithography | Burn Jeng Lin, Chenming Hu | 2013-07-16 |
| 8084305 | Isolation spacer for thin SOI devices | Chih-Hsin Ko, Wen-Chin Lee, Chung-Hu Ke | 2011-12-27 |
| 8062946 | Strained channel transistor structure with lattice-mismatched zone and fabrication method thereof | Chun-Chieh Lin, Wen-Chin Lee, Chenming Hu | 2011-11-22 |
| 8053839 | Doping of semiconductor fin devices | Ping-Wei Wang, Hao Chen, Fu-Liang Yang, Chenming Hu | 2011-11-08 |
| 7948037 | Multiple-gate transistor structure and method for fabricating | Hao Chen, Fu-Liang Yang | 2011-05-24 |
| 7892901 | Strained silicon-on-insulator transistors with mesa isolation | Chenming Hu | 2011-02-22 |
| 7892905 | Formation of strained Si channel and Si1-xGex source/drain structures using laser annealing | Kuang Kian Ong, Kin Leong Pey, King-Jien Chui, Ganesh Samudra, Yung Fu Chong | 2011-02-22 |
| 7888201 | Semiconductor-on-insulator SRAM configured using partially-depleted and fully-depleted transistors | Fu-Liang Yang, Chenming Hu | 2011-02-15 |
| 7863674 | Multiple-gate transistors formed on bulk substrates | Fu-Liang Yang, Chenming Hu | 2011-01-04 |