Issued Patents All Time
Showing 276–300 of 364 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7851276 | Methods and structures for planar and multiple-gate transistors formed on SOI | Fu-Liang Yang, Chenming Hu | 2010-12-14 |
| 7807546 | SRAM cell having stepped boundary regions and methods of fabrication | Wen-Chin Lee | 2010-10-05 |
| 7745279 | Capacitor that includes high permittivity capacitor dielectric | Chenming Hu | 2010-06-29 |
| 7728360 | Multiple-gate transistor structure | Hao Chen, Fu-Liang Yang | 2010-06-01 |
| 7704809 | Silicon-on-insulator chip with multiple crystal orientations | Fu-Liang Yang | 2010-04-27 |
| 7700267 | Immersion fluid for immersion lithography, and method of performing immersion lithography | Burn Jeng Lin, Chenming Hu | 2010-04-20 |
| 7701008 | Doping of semiconductor fin devices | Ping-Wei Wang, Hao Chen, Fu-Liang Yang, Chenming Hu | 2010-04-20 |
| 7659587 | Complementary metal oxide semiconductor transistor technology using selective epitaxy of a strained silicon germanium layer | Chun-Chieh Lin, Fu-Liang Yang, Chen Ming Hu | 2010-02-09 |
| 7646068 | Structure and method of a strained channel transistor and a second semiconductor component in an integrated circuit | Chih-Hsin Ko, Wen-Chin Lee, Chun-Chieh Lin, Chenming Hu | 2010-01-12 |
| 7635632 | Gate electrode for a semiconductor fin device | Hao Chen, Fu-Liang Yang, Chenming Hu | 2009-12-22 |
| 7633127 | Silicide gate transistors and method of manufacture | Cheng-Kuo Wen, Hsun-Chih Tsao | 2009-12-15 |
| 7582934 | Isolation spacer for thin SOI devices | Chih-Hsin Ko, Wen-Chin Lee, Chung-Hu Ke | 2009-09-01 |
| 7579135 | Lithography apparatus for manufacture of integrated circuits | Chenming Hu | 2009-08-25 |
| 7459756 | Method for forming a device having multiple silicide types | Chun-Chieh Lin, Wen-Chin Lee, Chuan-Yi Lin, Chenming Hu | 2008-12-02 |
| 7452778 | Semiconductor nano-wire devices and methods of fabrication | Hung-Wei Chen, Di-Hong Lee, Fu-Liang Yang, Chenming Hu | 2008-11-18 |
| 7442967 | Strained channel complementary field-effect transistors | Chih-Hsin Ko, Wen-Chin Lee, Chenming Hu | 2008-10-28 |
| 7423323 | Semiconductor device with raised segment | Hao Chen, Fu-Liang Yang, Chenming Hu | 2008-09-09 |
| 7394136 | High performance semiconductor devices fabricated with strain-induced processes and methods for making same | Chung-Hu Ke, Wen-Chin Lee, Chih-Hsin Ko, Chenming Hu | 2008-07-01 |
| 7381604 | Strained-channel semiconductor structure and method for fabricating the same | Chun-Chieh Lin | 2008-06-03 |
| 7372107 | SOI chip with recess-resistant buried insulator and method of manufacturing the same | Chenming Hu | 2008-05-13 |
| 7368334 | Silicon-on-insulator chip with multiple crystal orientations | Fu-Liang Yang | 2008-05-06 |
| 7358571 | Isolation spacer for thin SOI devices | Chih-Hsin Ko, Wen-Chin Lee, Chung-Hu Ke | 2008-04-15 |
| 7357838 | Relaxed silicon germanium substrate with low defect density | Chun-Chieh Lin, Chien-Chao Huang, Chao-Hsiung Wang, Tien-Chih Chang, Chenming Hu +4 more | 2008-04-15 |
| 7354830 | Methods of forming semiconductor devices with high-k gate dielectric | Chun-Chieh Lin, Wen-Chin Lee, Chenming Hu, Shang-Chih Chen, Chih-Hao Wang +1 more | 2008-04-08 |
| 7354843 | Method of forming a capacitor that includes forming a bottom electrode in a strained silicon layer | Chenming Hu | 2008-04-08 |