Issued Patents All Time
Showing 26–36 of 36 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9659896 | Interconnect structures for wafer level package and methods of forming same | Chih-Hao Chang, Tsung-Hsien Chiang, Guan-Yu Chen, Tin-Hao Kuo, Hao-Yi Tsai +1 more | 2017-05-23 |
| 9640521 | Multi-die package with bridge layer and method for making the same | Yu-Feng Chen, Chen-Shien Chen, Mirng-Ji Lii | 2017-05-02 |
| 9627339 | Method of forming an integrated circuit device including a pillar capped by barrier layer | — | 2017-04-18 |
| 9620465 | Dual-sided integrated fan-out package | Kuo Lung Pan, Tin-Hao Kuo, Hao-Yi Tsai, Chung-Shi Liu | 2017-04-11 |
| 9543278 | Semiconductor device with discrete blocks | Ching-Wen Hsiao, Chen-Shien Chen, Shou-Cheng Hu | 2017-01-10 |
| 9165887 | Semiconductor device with discrete blocks | Ching-Wen Hsiao, Chen-Shien Chen, Yen-Chang Hu | 2015-10-20 |
| 9142521 | Integrated circuit device including a copper pillar capped by barrier layer and method of forming the same | — | 2015-09-22 |
| 9070667 | Peripheral electrical connection of package on package | Ching-Wen Hsiao, Chih-Wei Lin, Yen-Chang Hu, Kuo Lung Pan, Yu-Chih Huang | 2015-06-30 |
| 8766441 | Methods and apparatus for solder on slot connections in package on package structures | Ching-Wen Hsiao, Chen-Shien Chen | 2014-07-01 |
| 8653659 | Integrated circuit device including a copper pillar capped by barrier layer | — | 2014-02-18 |
| 8232193 | Method of forming Cu pillar capped by barrier layer | — | 2012-07-31 |