PL

Peng-Soon Lim

TSMC: 39 patents #877 of 12,232Top 8%
NS National Semiconductor: 10 patents #172 of 2,238Top 8%
Infineon Technologies Ag: 1 patents #4,439 of 7,486Top 60%
📍 Kampung Sri Tambak, MY: #1 of 49 inventorsTop 3%
Overall (All Time): #53,718 of 4,157,543Top 2%
50
Patents All Time

Issued Patents All Time

Showing 26–50 of 50 patents

Patent #TitleCo-InventorsDate
9129953 Method of making a gate structure Da-Yuan Lee, Kuang-Yuan Hsu 2015-09-08
9048334 Metal gate structure Da-Yuan Lee, Kuang-Yuan Hsu 2015-06-02
8951841 Clip frame semiconductor packages and methods of formation thereof Melissa Mei Ching Ng, Mei Chin Ng 2015-02-10
8779530 Metal gate structure of a field effect transistor Da-Yuan Lee, Kuang-Yuan Hsu 2014-07-15
8736042 Delamination resistant device package having raised bond surface and mold locking aperture Felix C. Li, Yee Kim Lee, Terh Kuen Yii, Lee Han Meng@Eugene Lee 2014-05-27
8716785 Method and system for metal gate formation with wider metal gate fill margin Meng-Hsuan Chan, Kuang-Yuan Hsu 2014-05-06
8575727 Gate structures Chia-Pin Lin, Kuang-Yuan Hsu 2013-11-05
8546885 Metal gate electrode of a field effect transistor Cheng-Hao Hou, Da-Yuan Lee, Xiong-Fei Yu, Chun-Yuan Chou, Fan-Yi Hsu +2 more 2013-10-01
8441107 Gate structures Chia-Pin Lin, Kuang-Yuan Hsu 2013-05-14
8278173 Method of fabricating gate structures Chia-Pin Lin, Kuang-Yuan Hsu 2012-10-02
8258587 Transistor performance with metal gate Yuri Masuoka, Shyh-Horng Yang 2012-09-04
8193081 Method and system for metal gate formation with wider metal gate fill margin Meng-Hsuan Chan, Kuang-Yuan Hsu 2012-06-05
8114721 Method of controlling gate thickness in forming FinFET devices Shun Wu Lin, Matt Yeh, Ouyang Hui 2012-02-14
8097934 Delamination resistant device package having low moisture sensitivity Felix C. Li, Yee Kim Lee, Terh Kuen Yii, Lee Han Meng@Eugene Lee 2012-01-17
8030138 Methods and systems of packaging integrated circuits You Chye How, Shee Min Yeong, Sek Hoi Chong 2011-10-04
7871915 Method for forming metal gates in a gate last process Yong-Tian Hou, Chien-Hao Chen, Chi-Chun Chen 2011-01-18
7868433 Low stress cavity package Shee Min Yeong, You Chye How 2011-01-11
7838980 TO263 device package having low moisture sensitivity Yee Kim Lee, Terh Kuen Yii, Lee Han Meng@Eugene Lee 2010-11-23
7824990 Multi-metal-oxide high-K gate dielectrics Vincent S. Chang, Fong-Yu Yen, Jin Ying, Hun-Jan Tao 2010-11-02
7763958 Leadframe panel for power packages Terh Kuen Yii, Sek Hoi Chong 2010-07-27
7714418 Leadframe panel Terh Kuen Yii, Mohd Sabri Bin Mohamad Zin, Ken Pham 2010-05-11
7582954 Optical leadless leadframe package Terh Kuen Yii, You Chye How, Sek Hoi Chong, Shee Min Yeong 2009-09-01
7470978 Sawn power package and method of fabricating same Eng Hwa Tan, Santhiran Nadarajah 2008-12-30
7465634 Method of forming integrated circuit devices having n-MOSFET and p-MOSFET transistors with elevated and silicided source/drain structures Yong-Tian Hou, Jin Ying, Hun-Jan Tao 2008-12-16
7342297 Sawn power package Eng Hwa Tan, Santhiran Nadarajah 2008-03-11