Issued Patents All Time
Showing 76–100 of 112 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10153038 | Memory read stability enhancement with short segmented bit line architecture | Mahmut Sinangil, Hidehiro Fujiwara, Hung-Jen Liao, Yen-Huei Chen, Sahil Preet Singh | 2018-12-11 |
| 10008253 | Array architecture and write operations of thyristor based random access memory | Yue-Der Chih, Carlos H. Diaz, Jean-Pierre Colinge | 2018-06-26 |
| 9997219 | Memory macro and method of operating the same | Chien-Kuo Su, Cheng Hung Lee, Chiting Cheng, Hung-Jen Liao, Yen-Huei Chen +2 more | 2018-06-12 |
| 9959916 | Dual rail memory, memory macro and associated hybrid power supply method | Chiting Cheng, Cheng Hung Lee, Hung-Jen Liao, Michael Patrick Clinton | 2018-05-01 |
| 9922700 | Memory read stability enhancement with short segmented bit line architecture | Mahmut Sinangil, Hidehiro Fujiwara, Hung-Jen Liao, Yen-Huei Chen, Sahil Preet Singh | 2018-03-20 |
| 9865605 | Memory circuit having resistive device coupled with supply voltage line | Yen-Huei Chen, Hung-Jen Liao, Chih-Yu Lin, Wei-Cheng Wu | 2018-01-09 |
| 9842627 | Memory device with strap cells | Cheng Hung Lee, Chi-Ting Cheng, Hung-Jen Liao, Jhon Jhy Liaw, Yen-Huei Chen | 2017-12-12 |
| 9824729 | Memory macro and method of operating the same | Chien-Kuo Su, Cheng Hung Lee, Chiting Cheng, Hung-Jen Liao, Yen-Huei Chen +2 more | 2017-11-21 |
| 9762216 | Level shifter circuit using boosting circuit | Mahmut Sinangil, Hsin-Hsin Ko, Chiting Cheng, Yen-Huei Chen, Hung-Jen Liao | 2017-09-12 |
| 9741429 | Memory with write assist circuit | Yen-Huei Chen, Hidehiro Fujiwara, Hung-Jen Liao | 2017-08-22 |
| 9685224 | Memory with bit line control | Chen-Lin Yang, Cheng Hung Lee, Hung-Jen Liao, Kao-Cheng Lin, Yu-Hao Hsu | 2017-06-20 |
| 9680012 | Semiconductor device structure and method for forming the same | Carlos H. Diaz, Jean-Pierre Colinge, Yue-Der Chih | 2017-06-13 |
| 9666253 | Dual rail memory, memory macro and associated hybrid power supply method | Chiting Cheng, Cheng Hung Lee, Hung-Jen Liao, Michael Patrick Clinton | 2017-05-30 |
| 9659620 | Memory device with self-boosted mechanism | Yen-Huei Chen, Hung-Jen Liao, Chih-Yu Lin, Wei-Cheng Wu | 2017-05-23 |
| 9601162 | Memory devices with strap cells | Cheng Hung Lee, Chi-Ting Cheng, Hung-Jen Liao, Jhon Jhy Liaw, Yen-Huei Chen | 2017-03-21 |
| 9489991 | Memory reading circuit, memory device and method of operating memory device | Yangsyu Lin, Hsin-Hsin Ko, Chiting Cheng, Cheng Hung Lee | 2016-11-08 |
| 9437281 | Negative bitline boost scheme for SRAM write-assist | Wei-jer Hsieh, Yangsyu Lin, Hsiao Wen Lu, Chiting Cheng | 2016-09-06 |
| 9343140 | Boosted read write word line | Yen-Huei Chen, Chih-Yu Lin, Li-Wen Wang, Hung-Jen Liao | 2016-05-17 |
| 9324413 | Write assist circuit, memory device and method | Hsin-Hsin Ko, Yangsyu Lin, Chiting Cheng, Cheng Hung Lee | 2016-04-26 |
| 9324453 | Memory unit and method of testing the same | Wei-jer Hsieh, Hong-Chen Cheng, Chiting Cheng, Yangsyu Lin, Cheng Hung Lee | 2016-04-26 |
| 9305635 | High density memory structure | Yangsyu Lin, Hsiao Wen Lu, Chiting Cheng | 2016-04-05 |
| 9281031 | Method and apparatus for read assist to compensate for weak bit | Cheng Hung Lee, Chung-Cheng Chou, Hung-Jen Liao, Bin-Hau Lo | 2016-03-08 |
| 9263123 | Memory device and a method of operating the same | Chiting Cheng, Chien-Kuo Su, Cheng Hung Lee | 2016-02-16 |
| 9183341 | Pre-colored methodology of multiple patterning | Yen-Huei Chen, Hung-Jen Liao | 2015-11-10 |
| 9135971 | Boosted read write word line | Yen-Huei Chen, Chih-Yu Lin, Li-Wen Wang, Hung-Jen Liao | 2015-09-15 |