Issued Patents All Time
Showing 101–112 of 112 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9075936 | Pre-colored methodology of multiple patterning | Yen-Huei Chen, Wei Min Chan, Hung-Jen Liao | 2015-07-07 |
| 9070432 | Negative bitline boost scheme for SRAM write-assist | Wei-jer Hsieh, Yangsyu Lin, Hsiao Wen Lu, Chiting Cheng | 2015-06-30 |
| 9064550 | Method and apparatus for word line suppression | Chiting Cheng, Chien-Kuo Su, Chung-Cheng Chou, Jack Liu | 2015-06-23 |
| 9025356 | Fly-over conductor segments in integrated circuits with successive load devices along a signal path | Hsiao Wen Lu, Wei-jer Hsieh, Chiting Cheng, Chung-Cheng Chou | 2015-05-05 |
| 8958232 | Method and apparatus for read assist to compensate for weak bit | Cheng Hung Lee, Chung-Cheng Chou, Hung-Jen Liao, Bin-Hau Lo | 2015-02-17 |
| 8923078 | Voltage divider control circuit | Yangsyu Lin, Hsin-Hsin Ko, Chiting Cheng | 2014-12-30 |
| 8848461 | Memory cell having flexible read/write assist and method of using | Kun-Hsi Li, Chiting Cheng | 2014-09-30 |
| 8713491 | Pre-colored methodology of multiple patterning | Yen-Huei Chen, Hung-Jen Liao | 2014-04-29 |
| 8693265 | Data inversion for dual-port memory | Tzu-Kuei Lin, Hung-Jen Liao, Yen-Huei Chen, Jhon Jhy Liaw | 2014-04-08 |
| 8630132 | SRAM read and write assist apparatus | Chiting Cheng, Chung-Cheng Chou | 2014-01-14 |
| 8601411 | Pre-colored methodology of multiple patterning | Yen-Huei Chen, Wei Min Chan, Hung-Jen Liao | 2013-12-03 |
| 8559251 | Memory circuit and method of writing datum to memory circuit | Chih-Yu Lin, Wei Min Chan, Yen-Huei Chen, Hung-Jen Liao | 2013-10-15 |