Issued Patents All Time
Showing 826–850 of 858 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8030776 | Integrated circuit with protective structure | Chen-Hua Yu, Shin-Puu Jeng, Shang-Yun Hou, Hao-Yi Tsai, Hsiu-Ping Wei | 2011-10-04 |
| 8013333 | Semiconductor test pad structures | Ying-Ju Chen, Yu-Wen Liu, Hao-Yi Tsai, Shin-Puu Jeng | 2011-09-06 |
| 7998855 | Solving via-misalignment issues in interconnect structures having air-gaps | — | 2011-08-16 |
| 7952453 | Structure design for minimizing on-chip interconnect inductance | Hsueh-Chung Chen, Shin-Puu Jeng | 2011-05-31 |
| 7936067 | Backend interconnect scheme with middle dielectric layer having improved strength | Hao-Yi Tsai, Yu-Wen Liu, Ying-Ju Chen, Shin-Puu Jeng | 2011-05-03 |
| 7906836 | Heat spreader structures in scribe lines | Yu-Wen Liu, Jyh-Cherng Sheu, Hao-Yi Tsai, Shin-Puu Jeng, Chen-Hua Yu +1 more | 2011-03-15 |
| 7884473 | Method and structure for increased wire bond density in packages for semiconductor chips | Shih-Hsun Hsu | 2011-02-08 |
| 7868455 | Solving via-misalignment issues in interconnect structures having air-gaps | — | 2011-01-11 |
| 7859092 | Package structures | Benson Liu, Shin-Puu Jeng, Hao-Yi Tsai | 2010-12-28 |
| 7834351 | Semiconductor device | Shih-Hsun Hsu, Hsueh-Chung Chen | 2010-11-16 |
| 7816256 | Process for improving the reliability of interconnect structures and resulting structure | Jian-Hong Lin, Tzu-Li Lee | 2010-10-19 |
| 7803713 | Method for fabricating air gap for semiconductor device | Hsueh-Chung Chen, Shin-Puu Jeng | 2010-09-28 |
| 7786572 | System in package (SIP) structure | — | 2010-08-31 |
| 7754601 | Semiconductor interconnect air gap formation process | Shin-Puu Jeng, Hao-Yi Tsai | 2010-07-13 |
| 7714443 | Pad structure design with reduced density | Anbiarshy Wu, Shih-Hsun Hsu, Shang-Yun Hou, Hsueh-Chung Chen, Shin-Puu Jeng | 2010-05-11 |
| 7705696 | Structure design for minimizing on-chip interconnect inductance | Hsueh-Chung Chen, Shin-Puu Jeng | 2010-04-27 |
| 7692274 | Reinforced semiconductor structures | Shih-Hsun Hsu | 2010-04-06 |
| 7679195 | PAD structure and method of testing | — | 2010-03-16 |
| 7679384 | Parametric testline with increased test pattern areas | Shih-Hsun Hsu, Hao-Yi Tsai, Shin-Puu Jeng | 2010-03-16 |
| 7651893 | Metal electrical fuse structure | Hsueh-Chung Chen, Hao-Yi Tsai, Shin-Puu Jeng, Shang-Yun Hou | 2010-01-26 |
| 7615841 | Design structure for coupling noise prevention | Hsueh-Chung Chen | 2009-11-10 |
| 7553736 | Increasing dielectric constant in local regions for the formation of capacitors | Hao-Yi Tsai, Hsueh-Chung Chen | 2009-06-30 |
| 7538346 | Semiconductor device | Shih-Hsun Hsu, Hsueh-Chung Chen | 2009-05-26 |
| 7512924 | Semiconductor device structure and methods of manufacturing the same | Hsueh-Chung Chen, Yi-Lung Cheng, Shin-Puu Jeng | 2009-03-31 |
| 7449785 | Solder bump on a semiconductor substrate | Shin-Puu Jeng, Hao-Yi Tsai, Shang-Yun Hou, Chia-Lun Tsai | 2008-11-11 |