Issued Patents All Time
Showing 251–275 of 458 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9595443 | Metal gate structure of a semiconductor device | Ming Zhu, Hui-Wen Lin, Bao-Ru Young, Yuan-Sheng Huang, Ryan Chia-Jen Chen +4 more | 2017-03-14 |
| 9590059 | Interdigitated capacitor to integrate with flash memory | Yu-Hsiung Wang, Chen-Chin Liu | 2017-03-07 |
| 9583591 | Si recess method in HKMG replacement gate technology | Wei-Cheng Wu, Chin-Yi Huang, Shih-Chang Liu, Chang-Ming Wu | 2017-02-28 |
| 9576855 | Device and methods for high-k and metal gate stacks | Wei-Cheng Wu, Bao-Ru Young, Jin-Aun Ng, Po-Nien Chen | 2017-02-21 |
| 9577051 | Spacer structures of a semiconductor device | Lee-Wee Teo, Ming Zhu, Hui-Wen Lin, Bao-Ru Young | 2017-02-21 |
| 9570539 | Integration techniques for MIM or MIP capacitors with flash memory and/or high-κ metal gate CMOS technology | Yu-Hsiung Wang, Chen-Chin Liu | 2017-02-14 |
| 9559177 | Memory devices and method of fabricating same | Chang-Ming Wu, Wei-Cheng Wu, Shih-Chang Liu, Chia-Shiung Tsai | 2017-01-31 |
| 9543153 | Recess technique to embed flash memory in SOI technology | Wei-Cheng Wu, Kai-Shyang You | 2017-01-10 |
| 9536888 | Method to prevent oxide damage and residue contamination for memory device | Chang-Ming Wu, Shih-Chang Liu | 2017-01-03 |
| 9536977 | Vertical tunneling field-effect transistor cell and fabricating the same | Cheng-Cheng Kuo, Chi-Wen Liu, Ming Zhu | 2017-01-03 |
| 9525040 | Method of fabricating hybrid impact-ionization semiconductor device | Ming Zhu, Lee-Wee Teo | 2016-12-20 |
| 9515069 | Semiconductor die | Ming Zhu | 2016-12-06 |
| 9508721 | Metal gate structure of a CMOS semiconductor device | Ming Zhu, Bao-Ru Young | 2016-11-29 |
| 9502533 | Silicon recess etch and epitaxial deposit for shallow trench isolation (STI) | Bao-Ru Young, Wei-Cheng Wu, Kong-Pin Chang, Chia Ming Liang, Meng-Fang Hsu +2 more | 2016-11-22 |
| 9502514 | Memory devices and method of forming same | Chang-Ming Wu, Wei-Cheng Wu, Shih-Chang Liu, Chia-Shiung Tsai | 2016-11-22 |
| 9502466 | Dummy bottom electrode in interconnect to reduce CMP dishing | Wen-Chun You | 2016-11-22 |
| 9496276 | CMP fabrication solution for split gate memory embedded in HK-MG process | Wei-Cheng Wu, Chang-Ming Wu, Shih-Chang Liu | 2016-11-15 |
| 9484351 | Split gate memory device and method of fabricating the same | Chang-Ming Wu, Wei-Cheng Wu, Shih-Chang Liu, Chia-Shiung Tsai | 2016-11-01 |
| 9484352 | Method for forming a split-gate flash memory cell device with a low power logic device | Chang-Ming Wu, Shih-Chang Liu | 2016-11-01 |
| 9478633 | Method and apparatus of forming ESD protection device | Ming Zhu, Lee-Wee Teo | 2016-10-25 |
| 9472636 | Cost-effective gate replacement process | Ming Zhu, Bao-Ru Young, Jyun-Ming Lin, Wei-Cheng Wu | 2016-10-18 |
| 9466714 | Vertical tunneling field-effect transistor cell with coaxially arranged gate contacts and drain contacts | Cheng-Cheng Kuo, Ming Zhu | 2016-10-11 |
| 9455344 | Integrated circuit metal gate structure having tapered profile | Kong-Beng Thei, Chiung-Han Yeh, Ming-Yuan Wu, Mong-Song Liang | 2016-09-27 |
| 9431413 | STI recess method to embed NVM memory in HKMG replacement gate technology | Wei-Cheng Wu, Ya-Chen Kao | 2016-08-30 |
| 9431500 | Integrated circuit device having defined gate spacing and method of designing and fabricating thereof | Ming Zhu, Po-Nien Chen, Bao-Ru Young | 2016-08-30 |