Issued Patents All Time
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12412862 | Package structure and manufacturing method thereof | Chi-Yang Yu, Nien-Fang Wu, Yu-Min Liang, Jiun Yi Wu | 2025-09-09 |
| 11616037 | Integrated fan-out package and manufacturing method thereof | Chi-Yang Yu, Chin-Liang Chen, Kuan-Lin Ho, Yu-Min Liang | 2023-03-28 |
| 11424199 | Connector formation methods and packaged semiconductor devices | Jung Wei Cheng, Chien-Hsun Lee, Hao-Cheng Hou, Hung-Jen Lin, Chun-Chih Chuang +2 more | 2022-08-23 |
| 11355461 | Integrated fan-out package and manufacturing method thereof | Chi-Yang Yu, Chin-Liang Chen, Kuan-Lin Ho, Yu-Min Liang | 2022-06-07 |
| 11127644 | Planarization of semiconductor packages and structures resulting therefrom | Chi-Yang Yu, Yu-Min Liang, Jung Wei Cheng, Chien-Hsun Lee | 2021-09-21 |
| 10700031 | Integrated fan-out package and manufacturing method thereof | Chi-Yang Yu, Chin-Liang Chen, Kuan-Lin Ho, Yu-Min Liang | 2020-06-30 |
| 10522436 | Planarization of semiconductor packages and structures resulting therefrom | Chi-Yang Yu, Yu-Min Liang, Jung Wei Cheng, Chien-Hsun Lee | 2019-12-31 |
| 10522486 | Connector formation methods and packaged semiconductor devices | Jung Wei Cheng, Chien-Hsun Lee, Hao-Cheng Hou, Hung-Jen Lin, Chun-Chih Chuang +2 more | 2019-12-31 |
| 10157871 | Integrated fan-out package and manufacturing method thereof | Chi-Yang Yu, Chin-Liang Chen, Kuan-Lin Ho, Yu-Min Liang | 2018-12-18 |
| 9793242 | Packages with die stack including exposed molding underfill | Yu-Chih Liu, Wei-Ting Lin, Jing Ruei Lu, Tsung-Ding Wang | 2017-10-17 |
| 9691723 | Connector formation methods and packaged semiconductor devices | Jung Wei Cheng, Chien-Hsun Lee, Hao-Cheng Hou, Hung-Jen Lin, Chun-Chih Chuang +2 more | 2017-06-27 |