Issued Patents All Time
Showing 151–175 of 391 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9614187 | Electronic device package and package method thereof | Wen-Hong Liu, Hsuan-Yu Lin, Hsin-Chu Chen | 2017-04-04 |
| 9581900 | Self aligned patterning with multiple resist layers | Ming-Feng Shieh, Ken-Hsien Hsieh, Ru-Gun Liu, Shih-Ming Chang | 2017-02-28 |
| 9570823 | PCI-E connector cover and PCI-E connector module | Chung-Wei Chiang, Yung-Shun Kao | 2017-02-14 |
| 9564327 | Method for forming line end space structure using trimmed photo resist | Chia-Ying Lee, Jyu-Horng Shieh, Ming-Feng Shieh, Shih-Ming Chang, Ken-Hsien Hsieh +1 more | 2017-02-07 |
| 9502261 | Spacer etching process for integrated circuit design | Ru-Gun Liu, Cheng-Hsiung Tsai, Chung-Ju Lee, Chia-Ying Lee, Jyu-Horng Shieh +6 more | 2016-11-22 |
| 9478636 | Method of forming semiconductor device including source/drain contact having height below gate stack | Chih-Liang Chen, Kam-Tou Sio, Ru-Gun Liu, Meng-Hung Shen, Chun-Hung Liou +2 more | 2016-10-25 |
| 9449880 | Fin patterning methods for increased process margin | Chin-Yuan Tseng, Chi-Cheng Hung, Chun-Kuang Chen, Huan-Just Lin, Ru-Gun Liu +2 more | 2016-09-20 |
| 9362169 | Self-aligned semiconductor fabrication with fosse features | Shih-Ming Chang, Ken-Hsien Hsieh, Ming-Feng Shieh, Ru-Gun Liu, Tsai-Sheng Gau | 2016-06-07 |
| 9362119 | Methods for integrated circuit design and fabrication | Tsong-Hua Ou, Ken-Hsien Hsieh, Shih-Ming Chang, Wen-Chun Huang, Ru-Gun Liu +1 more | 2016-06-07 |
| 9356249 | Organic electronic device and electric field-induced carrier generation layer | Yi-Ming Chang, Chen-Kun Chen | 2016-05-31 |
| 9356021 | Self-alignment for two or more layers and methods of forming same | Shih-Ming Chang, Ru-Gun Liu, Ken-Hsien Hsieh, Ming-Feng Shieh, Tsai-Sheng Gau | 2016-05-31 |
| 9342116 | Stacked expansion card assembly | Yung-Shun Kao, Hui Ling Chung, Tzu-Hsiang Huang, Ji Su | 2016-05-17 |
| 9337083 | Multi-layer metal contacts | Ming-Feng Shieh, Wen-Hung Tseng, Ken-Hsien Hsieh, Tsai-Sheng Gau, Ru-Gun Liu | 2016-05-10 |
| 9305841 | Method of patterning a feature of a semiconductor device | Yen-Chun Huang, Ming-Feng Shieh, Ken-Hsien Hsieh, Ru-Gun Liu, Tsai-Sheng Gau | 2016-04-05 |
| 9281273 | Designed-based interconnect structure in semiconductor structure | Chih-Liang Chen, Yung-Sung Yen, Kam-Tou Sio, Tsong-Hua Ou, Chun-Kuang Chen +3 more | 2016-03-08 |
| 9281193 | Patterning method for semiconductor device fabrication | Yen-Chun Huang, Ken-Hsien Hsieh, Ming-Feng Shieh | 2016-03-08 |
| 9245763 | Mechanisms for forming patterns using multiple lithography processes | Shih-Ming Chang, Ming-Feng Shieh, Ru-Gun Liu, Tsai-Sheng Gau | 2016-01-26 |
| 9189587 | Chip level critical point analysis with manufacturer specific data | I-Chang Shih, Jen-Chieh Lo, Tzu-Chin Lin, Ping-Chieh Wu, Ying-Chou Cheng +1 more | 2015-11-17 |
| 9158884 | Method and system for repairing wafer defects | Shih-Ming Chang, Hung-Chang Hsieh | 2015-10-13 |
| 9153478 | Spacer etching process for integrated circuit design | Ru-Gun Liu, Shih-Ming Chang, Ken-Hsien Hsieh, Ming-Feng Shieh, Tsai-Sheng Gau +6 more | 2015-10-06 |
| 9076736 | Patterning method for semiconductor device fabrication | Yen-Chun Huang, Ming-Feng Shieh, Ken-Hsien Hsieh | 2015-07-07 |
| 9069249 | Self aligned patterning with multiple resist layers | Ming-Feng Shieh, Ken-Hsien Hsieh, Shih-Ming Chang, Ru-Gun Liu | 2015-06-30 |
| 9054159 | Method of patterning a feature of a semiconductor device | Yen-Chun Huang, Ming-Feng Shieh, Ken-Hsien Hsieh, Ru-Gun Liu, Tsai-Sheng Gau | 2015-06-09 |
| 9040433 | Photo resist trimmed line end space | Chia-Ying Lee, Jyu-Horng Shieh, Ming-Feng Shieh, Shih-Ming Chang, Ken-Hsien Hsieh +1 more | 2015-05-26 |
| 9033724 | Card edge connector | Yung-Shun Kao | 2015-05-19 |