Issued Patents All Time
Showing 351–375 of 937 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11777003 | Semiconductor structure with wraparound backside amorphous layer | Shih-Chuan Chiu, Huan-Chieh Su, Pei-Yu Wang, Cheng-Chi Chuang, Chun-Yuan Chen +3 more | 2023-10-03 |
| 11776854 | Semiconductor structure with hybrid nanostructures | Pei-Hsun Wang, Chun-Hsiung Lin, Chih-Chao Chou | 2023-10-03 |
| 11769696 | Method for fabricating a semiconductor device | Chun-Yuan Chen, Li-Zhen Yu, Huan-Chieh Su, Lo-Heng Chang, Cheng-Chi Chuang | 2023-09-26 |
| 11764292 | Negative-capacitance field effect transistor | Bo-Feng Young, Chih-Yu Chang, Sai-Hooi Yeong, Chi On Chui | 2023-09-19 |
| 11764286 | Reducing parasitic capacitance for gate-all-around device by forming extra inner spacers | Kuo-Cheng Ching, Shi Ning Ju, Kuan-Lun Cheng | 2023-09-19 |
| 11764281 | Gate air spacer for fin-like field effect transistor | Chien Ning Yao, Bo-Feng Young, Sai-Hooi Yeong, Kuan-Lun Cheng | 2023-09-19 |
| 11764203 | Integrated hybrid standard cell structure with gate-all-around device | Shang-Wen Chang, Min Cao | 2023-09-19 |
| 11764065 | Methods of forming silicide contact in field-effect transistors | Chun-Hsiung Lin, Shih-Cheng Chen, Jung-Hung Chang, Jui-Chien Huang | 2023-09-19 |
| 11757021 | Semiconductor devices with fin-top hard mask and methods for fabrication thereof | Yi-Ruei Jhan, Kuan-Ting Pan, Kuo-Cheng Chiang, Kuan-Lun Cheng | 2023-09-12 |
| 11756995 | Method of forming a semiconductor device structure having an isolation layer to isolate a conductive feature and a gate electrode layer | Lung-Kun Chu, Mao-Lin Huang, Chung-Wei Hsu, Jia-Ni Yu, Kuan-Lun Cheng +1 more | 2023-09-12 |
| 11756958 | Semiconductor device structure and methods of forming the same | Jia-Chuan You, Shi Ning Ju, Kuo-Cheng Chiang | 2023-09-12 |
| 11749728 | Semiconductor device and manufacturing method thereof | Li-Zhen Yu, Chia-Hao Chang, Cheng-Chi Chuang, Yu-Ming Lin | 2023-09-05 |
| 11749725 | Methods of forming source/drain contacts in field-effect transistors | Sheng-Tsung Wang, Chia-Hao Chang, Yu-Ming Lin | 2023-09-05 |
| 11742428 | Formation method of semiconductor device with isolation structure | Kuo-Cheng Chiang, Huan-Chieh Su, Kuan-Ting Pan, Shi Ning Ju | 2023-08-29 |
| 11742415 | Fin-like field effect transistor patterning methods for achieving fin width uniformity | Kuo-Cheng Ching, Shi Ning Ju, Kuan-Lun Cheng | 2023-08-29 |
| 11742385 | Selective liner on backside via and method thereof | Lin-Yu Huang, Li-Zhen Yu, Chia-Hao Chang, Cheng-Chi Chuang, Kuan-Lun Cheng | 2023-08-29 |
| 11742280 | Integrated circuits with backside power rails | Chih-Chao Chou, Kuo-Cheng Chiang, Shi Ning Ju, Wen-Ting Lan | 2023-08-29 |
| 11735666 | Gate all around structure with additional silicon layer and method for forming the same | Chen-Han Wang, Pei-Hsun Wang, Chun-Hsiung Lin | 2023-08-22 |
| 11735650 | Structure and method for FinFET device with buried sige oxide | Kuo-Cheng Ching, Carlos H. Diaz, Zhiqiang Wu | 2023-08-22 |
| 11735649 | Method for forming fin field effect transistor (FinFET) with a liner layer | Kuo-Cheng Ching, Kuan-Ting Pan, Shi Ning Ju | 2023-08-22 |
| 11735647 | Method for forming semiconductor device | Wang-Chun Huang, Hou-Yu Chen, Kuan-Lun Cheng | 2023-08-22 |
| 11735641 | FinFET structure with airgap and method of forming the same | Chien Ning Yao, Kai-Hsuan Lee, Sai-Hooi Yeong, Wei-Yang Lee, Kuan-Lun Cheng | 2023-08-22 |
| 11735594 | Integrated circuit structure and method with hybrid orientation for FinFET | Tzer-Min Shen, Zhiqiang Wu, Chung-Cheng Wu, Ching-Wei Tsai, Kuan-Lun Cheng +1 more | 2023-08-22 |
| 11735591 | Semiconductor devices with dielectric fins and method for forming the same | Kuan-Ting Pan, Shi Ning Ju, Jia-Chuan You, Kuo-Cheng Chiang | 2023-08-22 |
| 11735482 | Semiconductor device structure and methods of forming the same | Kuan-Ting Pan, Kuo-Cheng Chiang, Shang-Wen Chang, Ching-Wei Tsai, Kuan-Lun Cheng | 2023-08-22 |