CH

Chung-Wei Hsu

TSMC: 82 patents #358 of 12,232Top 3%
AE Advanced Semiconductor Engineering: 5 patents #215 of 1,073Top 25%
UM United Microelectronics: 4 patents #1,253 of 4,560Top 30%
WN Wistron Neweb: 2 patents #191 of 577Top 35%
AB Asml Masktools B.V.: 2 patents #22 of 37Top 60%
NT Nanya Technology: 2 patents #292 of 775Top 40%
SE Syncmold Enterprise: 1 patents #34 of 71Top 50%
AI Acer Incorporated: 1 patents #525 of 935Top 60%
📍 Dashulong, TW: #22 of 596 inventorsTop 4%
Overall (All Time): #14,621 of 4,157,543Top 1%
99
Patents All Time

Issued Patents All Time

Showing 1–25 of 99 patents

Patent #TitleCo-InventorsDate
12419073 Device having a gate electrode wrapping around semiconductor layers and proximate to a dielectric fin Lung-Kun Chu, Mao-Lin Huang, Jia-Ni Yu, Kuo-Cheng Chiang, Chih-Hao Wang 2025-09-16
12396248 Semiconductor device fabrication methods and structures thereof Kuo-Cheng Chiang, Mao-Lin Huang, Lung-Kun Chu, Jia-Ni Yu, Kuan-Lun Cheng +1 more 2025-08-19
12389675 Semiconductor device having nanosheet transistor and methods of fabrication thereof Mao-Lin Huang, Jia-Ni Yu, Lung-Kun Chu, Chih-Hao Wang, Kuo-Cheng Chiang +1 more 2025-08-12
12362281 Partial barrier free vias for cobalt-based interconnects and methods of fabrication thereof Tsung-Ling Tsai, Shen-Nan Lee, Mrunal A. Khaderbad, Chen-Hao Wu, Teng-Chun Tsai 2025-07-15
12324219 Integrated circuit including dipole incorporation for threshold voltage tuning in transistors Lung-Kun Chu, Mao-Lin Huang, Jia-Ni Yu, Kuo-Cheng Chiang, Kuan-Lun Cheng +1 more 2025-06-03
12315731 Integrated circuit with nanosheet transistors with metal gate passivation Mao-Lin Huang, Lung-Kun Chu, Jia-Ni Yu, Kuo-Cheng Chiang, Kuan-Lun Cheng +1 more 2025-05-27
12288695 Method of forming a transistor device having dipole-containing gate dielectric layer and fluorine-containing gate dielectric layer Kuo-Cheng Chiang, Mao-Lin Huang, Lung-Kun Chu, Jia-Ni Yu, Chun-Fu Lu +1 more 2025-04-29
12261089 Semiconductor device package and a method of manufacturing the same Tsung-Yu Lin, Pei-Yu Wang 2025-03-25
12237418 Liner for a bi-layer gate helmet and the fabrication thereof Huan-Chieh Su, Chih-Hao Wang, Kuo-Cheng Chiang, Wei-Hao Wu, Zhi-Chang Lin +2 more 2025-02-25
12237373 Field effect transistor and method Lung-Kun Chu, Jia-Ni Yu, Chih-Hao Wang, Kuo-Cheng Chiang, Kuan-Lun Cheng +1 more 2025-02-25
12237396 P-metal gate first gate replacement process for multigate devices Jia-Ni Yu, Kuo-Cheng Chiang, Lung-Kun Chu, Chih-Hao Wang, Mao-Lin Huang 2025-02-25
12237372 Field effect transistor and method Lung-Kun Chu, Jia-Ni Yu, Chih-Hao Wang, Kuo-Cheng Chiang, Kuan-Lun Cheng +1 more 2025-02-25
12206005 Semiconductor structures and methods thereof Kuo-Cheng Chiang, Mao-Lin Huang, Lung-Kun Chu, Jia-Ni Yu, Kuan-Lun Cheng +1 more 2025-01-21
12199190 Silicon channel tempering Mao-Lin Huang, Jia-Ni Yu, Lung-Kun Chu, Chih-Hao Wang, Kuo-Cheng Chiang +1 more 2025-01-14
12191209 Semiconductor device Kuo-Cheng Chiang, Lung-Kun Chu, Jia-Ni Yu, Chih-Hao Wang, Mao-Lin Huang 2025-01-07
12176217 Method for manufacturing a semiconductor using slurry Chun-Hung Liao, Tsung-Ling Tsai, Chen-Hao Wu, An-Hsuan Lee, Shen-Nan Lee +2 more 2024-12-24
12176391 Semiconductor device structure having an isolation layer to isolate a conductive feature and a gate electrode layer Lung-Kun Chu, Mao-Lin Huang, Jia-Ni Yu, Kuan-Lun Cheng, Kuo-Cheng Chiang +1 more 2024-12-24
12170231 Gate-all-around device with trimmed channel and dipoled dielectric layer and methods of forming the same Kuo-Cheng Chiang, Kuan-Lun Cheng, Hou-Yu Chen, Ching-Wei Tsai, Chih-Hao Wang +3 more 2024-12-17
12166100 Nanosheet device with dipole dielectric layer and methods of forming the same Kuo-Cheng Chiang, Lung-Kun Chu, Mao-Lin Huang, Jia-Ni Yu, Chih-Hao Wang 2024-12-10
12148750 Work function design to increase density of nanosheet devices Mao-Lin Huang, Chih-Hao Wang, Kuo-Cheng Chiang, Jia-Ni Yu, Lung-Kun Chu 2024-11-19
12119391 Fin-based semiconductor device structure including self-aligned contacts and method for forming the same Mao-Lin Huang, Lung-Kun Chu, Jia-Ni Yu, Chun-Fu Lu, Kuo-Cheng Chiang +2 more 2024-10-15
12119266 Semiconductor arrangement and method of manufacture Kuo-Cheng Ching, Lung-Kun Chu, Mao-Lin Huang 2024-10-15
12107131 Gate-all-around devices having self-aligned capping between channel and backside power rail Lung-Kun Chu, Mao-Lin Huang, Jia-Ni Yu, Kuo-Cheng Chiang, Kuan-Lun Cheng +1 more 2024-10-01
12087772 Nanosheet device architecture for cell-height scaling Kuo-Cheng Chiang, Mao-Lin Huang, Lung-Kun Chu, Jia-Ni Yu, Kuan-Lun Cheng +1 more 2024-09-10
12087771 Multiple patterning gate scheme for nanosheet rule scaling Lung-Kun Chu, Mao-Lin Huang, Jia-Ni Yu, Chun-Fu Lu, Kuo-Cheng Chiang +2 more 2024-09-10