Issued Patents All Time
Showing 1–25 of 71 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12408440 | Method of making amphi-FET structure and method of designing | Chih-Yu Lai, Chih-Liang Chen, Chi-Yu Lu, Shang-Syuan Ciou, Hui-Zhong Zhuang +1 more | 2025-09-02 |
| 12400950 | Interconnect structure and methods thereof | Yi-Hsiung Lin | 2025-08-26 |
| 12368078 | Dual-side power rail design and method of making same | Chih-Chao Chou, Yi-Hsun Chiu, Ching-Wei Tsai, Chih-Hao Wang | 2025-07-22 |
| 12363879 | FinFET SRAM cells with reduced fin pitch | Chih-Hao Wang, Yi-Hsun Chiu, Yi-Hsiung Lin | 2025-07-15 |
| 12327765 | Semiconductor device with contact structures | Yi-Hsiung Lin, Yi-Hsun Chiu | 2025-06-10 |
| 12272605 | Methods of forming contact features in field-effect transistors | Yi-Hsiung Lin, Yi-Hsun Chiu | 2025-04-08 |
| 12266594 | Method of making semiconductor device having self-aligned interconnect structure | Chih-Yu Lai, Chih-Liang Chen, Chi-Yu Lu, Shang-Syuan Ciou, Hui-Zhong Zhuang +1 more | 2025-04-01 |
| 12237233 | Backside power rail for physical failure analysis (PFA) | Chih-Chao Chou, Yi-Hsun Chiu, Ching-Wei Tsai, Chih-Hao Wang | 2025-02-25 |
| 12165926 | FinFET device structure having dielectric features between a plurality of gate electrodes and methods of forming the same | Kuan-Ting Pan, Kuo-Cheng Chiang, Ching-Wei Tsai, Kuan-Lun Cheng, Chih-Hao Wang | 2024-12-10 |
| 12148745 | Integrated hybrid standard cell structure with gate-all-around device | Chih-Hao Wang, Min Cao | 2024-11-19 |
| 12113066 | Integrated circuit device including a power supply line and method of forming the same | Yi-Hsiung Lin, Yi-Hsun Chiu | 2024-10-08 |
| 12107012 | Method for forming fin field effect transistor device structure | Yi-Hsiung Lin, Yi-Hsun Chiu | 2024-10-01 |
| 12080713 | Self-aligned etch in semiconductor devices | Yi-Hsun Chiu, Ching-Wei Tsai, Yu-Xuan Huang, Cheng-Chi Chuang | 2024-09-03 |
| 12034009 | Semiconductor device segmented interconnect | Chih-Yu Lai, Chih-Liang Chen, Ching-Wei Tsai, Li-Chun Tien | 2024-07-09 |
| 12033935 | Semiconductor device including recessed interconnect structure | Guo-Huei Wu, Hui-Zhong Zhuang, Chih-Liang Chen, Cheng-Chi Chuang, Yi-Hsun Chiu | 2024-07-09 |
| 12009362 | Method of making amphi-FET structure and method of designing | Chih-Yu Lai, Chih-Liang Chen, Chi-Yu Lu, Shang-Syuan Ciou, Hui-Zhong Zhuang +1 more | 2024-06-11 |
| 11978736 | Semiconductor device with improved device performance | Chih-Hao Wang, Min Cao | 2024-05-07 |
| 11942420 | Semiconductor device including recessed interconnect structure | Guo-Huei Wu, Hui-Zhong Zhuang, Chih-Liang Chen, Cheng-Chi Chuang, Yi-Hsun Chiu | 2024-03-26 |
| 11862561 | Semiconductor devices with backside routing and method of forming same | Yi-Hsun Chiu, Cheng-Chi Chuang, Ching-Wei Tsai, Wei-Cheng Lin, Shih-Wei Peng +1 more | 2024-01-02 |
| 11854940 | Semiconductor device having self-aligned interconnect structure and method of making | Chih-Yu Lai, Chih-Liang Chen, Chi-Yu Lu, Shang-Syuan Ciou, Hui-Zhong Zhuang +1 more | 2023-12-26 |
| 11848327 | Integrated circuit device including a power supply line and method of forming the same | Yi-Hsiung Lin, Yi-Hsun Chiu | 2023-12-19 |
| 11810917 | Self-aligned etch in semiconductor devices | Yi-Hsun Chiu, Ching-Wei Tsai, Yu-Xuan Huang, Cheng-Chi Chuang | 2023-11-07 |
| 11791215 | Fin field effect transistor device structure | Yi-Hsiung Lin, Yi-Hsun Chiu | 2023-10-17 |
| 11784233 | Integrated circuit structure with backside via rail | Huan-Chieh Su, Li-Zhen Yu, Chun-Yuan Chen, Cheng-Chi Chuang, Yi-Hsun Chiu +3 more | 2023-10-10 |
| 11764213 | Amphi-FET structure, method of making and method of designing | Chih-Yu Lai, Chih-Liang Chen, Chi-Yu Lu, Shang-Syuan Ciou, Hui-Zhong Zhuang +1 more | 2023-09-19 |