Issued Patents All Time
Showing 1–25 of 75 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12412775 | Isolation structures in semiconductor devices | Fu-Ting Yen, Wei-Ting Yeh, Yu-Yun Peng | 2025-09-09 |
| 12347775 | Semiconductor devices with backside power rail and methods of fabrication thereof | Lo-Heng Chang, Kuo-Cheng Chiang, Zhi-Chang Lin, Jung-Hung Chang, Shi Ning Ju +1 more | 2025-07-01 |
| 12349379 | Semiconductor devices and methods of manufacture | Zhi-Chang Lin, Lo-Heng Chang, Jung-Hung Chang, Kuo-Cheng Chiang | 2025-07-01 |
| 12342616 | Semiconductor device structure and methods of forming the same | Zhi-Chang Lin, Jung-Hung Chang, Lo-Heng Chang, Chih-Hao Wang, Chien Ning Yao +1 more | 2025-06-24 |
| 12342587 | Integrated circuit with nanostructure transistors and bottom dielectric insulators | Zhi-Chang Lin, Chien Ning Yao, Jung-Hung Chang, Tsung-Han CHUANG, Kuo-Cheng Chiang +1 more | 2025-06-24 |
| 12336226 | Semiconductor device structure including stacked nanostructures | Jung-Hung Chang, Zhi-Chang Lin, Chien Ning Yao, Tsung-Han CHUANG, Kai-Lin Chuang +2 more | 2025-06-17 |
| 12336240 | Transistor including dielectric barrier and manufacturing method thereof | Zhi-Chang Lin, Jung-Hung Chang, Chien Ning Yao, Kuo-Cheng Chiang, Chih-Hao Wang | 2025-06-17 |
| 12317540 | Method for manufacturing semiconductor structure with isolation feature | Zhi-Chang Lin, Jung-Hung Chang, Chien Ning Yao, Tsung-Han CHUANG, Kuo-Cheng Chiang | 2025-05-27 |
| 12300732 | Gate all around transistor with dual inner spacers | Zhi-Chang Lin, Kuan-Ting Pan, Jung-Hung Chang, Lo-Heng Chang, Chien Ning Yao +1 more | 2025-05-13 |
| 12272690 | Gate isolation for multigate device | Shi Ning Ju, Zhi-Chang Lin, Chih-Hao Wang, Kuo-Cheng Chiang, Kuan-Ting Pan | 2025-04-08 |
| 12272732 | Method for forming epitaxial source/drain features and semiconductor devices fabricated thereof | Jung-Hung Chang, Zhi-Chang Lin, Chien Ning Yao, Kuo-Cheng Chiang, Chih-Hao Wang | 2025-04-08 |
| 12218210 | Semiconductor device | Chun-Hsiung Lin, Chih-Hao Wang | 2025-02-04 |
| 12205998 | Semiconductor device with wrap around silicide and hybrid fin | Zhi-Chang Lin, Jung-Hung Chang, Chien Ning Yao, Tsung-Han CHUANG, Kuo-Cheng Chiang +1 more | 2025-01-21 |
| 12119270 | Hybrid source drain regions formed based on same fin and methods forming same | Pei-Hsun Wang, Chun-Hsiung Lin, Chih-Hao Wang | 2024-10-15 |
| 12107169 | Contact structure for stacked multi-gate device | Zhi-Chang Lin, Jung-Hung Chang, Chien Ning Yao, Kuo-Cheng Chiang, Chih-Hao Wang | 2024-10-01 |
| 12087079 | Display apparatus and fingerprint sensing method thereof | Cho-Hsuan Jhang, Chao-Yu Meng, Chih-Peng Hsia | 2024-09-10 |
| 12074204 | Semiconductor structure and method for forming the same | Jung-Hung Chang, Lo-Heng Chang, Zhi-Chang Lin, Chien Ning Yao, Kuo-Cheng Chiang +1 more | 2024-08-27 |
| 12062721 | Latch-up prevention | Kuo-Cheng Chiang, Zhi-Chang Lin | 2024-08-13 |
| 12057401 | Semiconductor device having contact plug connected to gate structure on PMOS region | Li-Hsuan Ho, Tsuo-Wen Lu, Shih-Hao Liang, Tsung-Hsun Wu, Po-Jen Chuang +1 more | 2024-08-06 |
| 12051736 | Field effect transistor with inner spacer liner layer and method | Tsung-Han CHUANG, Zhi-Chang Lin, Jung-Hung Chang, Chien Ning Yao, Kuo-Cheng Chiang +1 more | 2024-07-30 |
| 12009216 | Methods of forming silicide contact in field-effect transistors | Chun-Hsiung Lin, Chih-Hao Wang, Jung-Hung Chang, Jui-Chien Huang | 2024-06-11 |
| 12009215 | Semiconductor device structure with silicide layer | Chun-Hsiung Lin, Jung-Hung Chang, Kuo-Cheng Chiang, Chih-Hao Wang | 2024-06-11 |
| 11996483 | FET with wrap-around silicide and fabrication methods thereof | Pei-Hsun Wang, Chih-Chao Chou, Jung-Hung Chang, Jui-Chien Huang, Chun-Hsiung Lin +1 more | 2024-05-28 |
| 11996482 | Semiconductor device | Zhi-Chang Lin, Jung-Hung Chang, Lo-Heng Chang, Chien Ning Yao | 2024-05-28 |
| 11984363 | Dual silicide structure and methods thereof | Chun-Hsiung Lin, Chih-Hao Wang | 2024-05-14 |