Issued Patents All Time
Showing 101–125 of 164 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7029994 | Strained channel on insulator device | Chung-Hu Ge, Chao-Hsiung Wang, Chien-Chao Huang, Wen-Chin Lee | 2006-04-18 |
| 7022561 | CMOS device | Chien-Chao Huang, Chao-Hsing Wang, Chung-Hu Ge | 2006-04-04 |
| 6979867 | SOI chip with mesa isolation and recess resistant regions | Yee-Chia Yeo, Hao Chen, Hsun-Chih Tsao, Fu-Liang Yang | 2005-12-27 |
| 6958291 | Interconnect with composite barrier layers and method for fabricating the same | Chen-Hua Yu, Horng-Huei Tseng, Syun-Ming Jang | 2005-10-25 |
| 6955952 | Strain balanced structure with a tensile strained silicon channel and a compressive strained silicon-germanium channel for CMOS performance enhancement | Yee-Chia Yeo, Chun-Chieh Lin, Fu-Liang Yang, Mong-Song Liang | 2005-10-18 |
| 6949769 | Suppression of MOSFET gate leakage current | Yee-Chia Yeo | 2005-09-27 |
| 6949443 | High performance semiconductor devices fabricated with strain-induced processes and methods for making same | Chung-Hu Ke, Wen-Chin Lee, Yee-Chia Yeo, Chih-Hsin Ko | 2005-09-27 |
| 6949451 | SOI chip with recess-resistant buried insulator and method of manufacturing the same | Yee-Chia Yeo | 2005-09-27 |
| 6940705 | Capacitor with enhanced performance and method of manufacture | Yee-Chia Yeo | 2005-09-06 |
| 6936881 | Capacitor that includes high permittivity capacitor dielectric | Yee-Chia Yeo | 2005-08-30 |
| 6921913 | Strained-channel transistor structure with lattice-mismatched zone | Yee-Chia Yeo, Chun-Chieh Lin, Wen-Chin Lee | 2005-07-26 |
| 6906398 | Semiconductor chip with gate dielectrics for high-performance and low-leakage applications | Yee-Chia Yeo, Fu-Liang Yang | 2005-06-14 |
| 6902965 | Strained silicon structure | Chung-Hu Ge, Wen-Chin Lee | 2005-06-07 |
| 6900502 | Strained channel on insulator device | Chung-Hu Ge, Chao-Hsuing Wang, Chien-Chao Huang, Wen-Chin Lee | 2005-05-31 |
| 6882025 | Strained-channel transistor and methods of manufacture | Yee-Chia Yeo, Chih-Hsin Ko, Wen-Chin Lee | 2005-04-19 |
| 6878610 | Relaxed silicon germanium substrate with low defect density | Chun Chich Lin, Yee-Chia Yeo, Chien-Chao Huang, Chao-Hsiung Wang, Tien-Chih Chang +4 more | 2005-04-12 |
| 6872606 | Semiconductor device with raised segment | Hao Chen, Yee-Chia Yeo, Fu-Liang Yang | 2005-03-29 |
| 6867433 | Semiconductor-on-insulator chip incorporating strained-channel partially-depleted, fully-depleted, and multiple-gate transistors | Yee-Chia Yeo, How-Yu Chen, Chien-Chao Huang, Wen-Chin Lee, Fu-Liang Yang | 2005-03-15 |
| 6864149 | SOI chip with mesa isolation and recess resistant regions | Yee-Chia Yeo, Hao Chen, Hsun-Chih Tsao, Fu-Liang Yang | 2005-03-08 |
| 6864519 | CMOS SRAM cell configured using multiple-gate transistors | Yee-Chia Yeo, Fu-Liang Yang | 2005-03-08 |
| 6855606 | Semiconductor nano-rod devices | Hao Chen, Yee-Chia Yeo, Fu-Liang Yang | 2005-02-15 |
| 6855990 | Strained-channel multiple-gate transistor | Yee-Chia Yeo, Fu-Liang Yang | 2005-02-15 |
| 6847098 | Non-floating body device with enhanced performance | Horng-Huei Tseng, Jyh-Chyurn Guo, Da-Chi Lin | 2005-01-25 |
| 6844238 | Multiple-gate transistors with improved gate control | Yee-Chia Yeo, Fu-Liang Yang | 2005-01-18 |
| 6830953 | Suppression of MOSFET gate leakage current | Yee-Chia Yeo | 2004-12-14 |