Issued Patents All Time
Showing 26–50 of 167 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11881477 | Dummy poly layout for high density devices | Yung Feng Chang, Yu-Jung Chang, Tzung-Chi Lee, Tung-Heng Hsieh, Chun-Chia Hsu | 2024-01-23 |
| 11869800 | Method for fabricating a semiconductor device | Harry-Hak-Lay Chuang, Wei-Cheng Wu, Meng-Fang Hsu, Kong-Pin Chang, Chia Ming Liang | 2024-01-09 |
| 11855081 | Method of forming epitaxial features | Ming-Yang Huang, Yung Feng Chang, Tung-Heng Hsieh | 2023-12-26 |
| 11855073 | ESD structure | Chun-Chia Hsu, Tung-Heng Hsieh, Yung Feng Chang, Jam-Wem Lee, Chih-Hung Wang | 2023-12-26 |
| 11798942 | Methods of manufacturing semiconductor devices having fins and an isolation region | Chia-Sheng Fan, Tung-Heng Hsieh | 2023-10-24 |
| 11797743 | Leakage reduction between two transistor devices on a same continuous fin | Chun-Yen Lin, Tung-Heng Hsieh | 2023-10-24 |
| 11742244 | Leakage reduction methods and structures thereof | Chia-Sheng Fan, Chun-Yen Lin, Tung-Heng Hsieh | 2023-08-29 |
| 11721590 | Semiconductor device and method | Shih-Chieh Wu, Pang-Chi Wu, Kuo-Yi Chao, Mei-Yun Wang, Hsien-Huang Liao +1 more | 2023-08-08 |
| 11721687 | Semiconductor structures having wells with protruding sections for pickup cells | Yung Feng Chang, Chun-Chia Hsu, Tung-Heng Hsieh | 2023-08-08 |
| 11688654 | Test line structure, semiconductor structure and method for forming test line structure | Yen-Chun Lin, Chung-Yi Lin, Yen-Sen Wang | 2023-06-27 |
| 11581221 | Method and IC design with non-linear power rails | Sheng-Hsiung Wang, Tung-Heng Hsieh | 2023-02-14 |
| 11532607 | ESD structure and semiconductor structure | Chun-Chia Hsu, Tung-Heng Hsieh, Yung Feng Chang, Jam-Wem Lee, Chih-Hung Wang | 2022-12-20 |
| 11527527 | Tap cell, integrated circuit structure and forming method thereof | Yung Feng Chang, Tung-Heng Hsieh, Chun-Chia Hsu | 2022-12-13 |
| 11508631 | Semiconductor device | Yen-Chun Lin, Ting-Yun Wu, Yen-Sen Wang, Hsiao-Wen Hsu | 2022-11-22 |
| 11508624 | Gate-all-around device with different channel semiconductor materials and method of forming the same | Jhe-Ching Lu, Yen-Sen Wang, Tsung-Chieh Tsai | 2022-11-22 |
| 11507725 | Integrated circuit layouts with line-end extensions | Hsien-Huang Liao, Tung-Heng Hsieh, Yung Feng Chang | 2022-11-22 |
| 11482518 | Semiconductor structures having wells with protruding sections for pickup cells | Yung Feng Chang, Chun-Chia Hsu, Tung-Heng Hsieh | 2022-10-25 |
| 11398559 | Mitigation of time dependent dielectric breakdown | Yi-Jyun Huang, Tung-Heng Hsieh | 2022-07-26 |
| 11393724 | Semiconductor device and method | Shih-Chieh Wu, Pang-Chi Wu, Kuo-Yi Chao, Mei-Yun Wang, Hsien-Huang Liao +1 more | 2022-07-19 |
| 11393726 | Metal gate structure of a CMOS semiconductor device and method of forming the same | Ming Zhu, Harry-Hak-Lay Chuang | 2022-07-19 |
| 11380775 | Gate structure of a semiconductor device and method of making | Ming Zhu, Hui-Wen Lin, Harry-Hak-Lay Chuang, Yuan-Sheng Huang, Ryan Chia-Jen Chen +4 more | 2022-07-05 |
| 11094545 | Self-aligned insulated film for high-K metal gate device | Jin-Aun Ng, Harry-Hak-Lay Chuang, Maxi Chang, Chih-Tang Peng, Chih-Yang Yeh +8 more | 2021-08-17 |
| 11043572 | Metal gate structure and methods thereof | Tzung-Chi Lee, Tung-Heng Hsieh, Chia-Sheng Fan | 2021-06-22 |
| 11018241 | Polysilicon design for replacement gate technology | Harry-Hak-Lay Chuang, Kong-Beng Thei, Sheng-Chen Chung, Chiung-Han Yeh, Lee-Wee Teo +1 more | 2021-05-25 |
| 11004842 | System and method of fabricating ESD FinFET with improved metal landing in the drain | Tzung-Chi Lee, Tung-Heng Hsieh, Yung Feng Chang | 2021-05-11 |