Issued Patents All Time
Showing 1–24 of 24 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7045395 | Method of fabricating a thin and fine ball-grid array package with embedded heat spreader | Chi-Chuan Wu | 2006-05-16 |
| 6951776 | Method of fabricating a thin and fine ball-grid array package with embedded heat spreader | Chi-Chuan Wu | 2005-10-04 |
| 6949413 | Method of fabricating a thin and fine ball-grid array package with embedded heat spreader | Chi-Chuan Wu | 2005-09-27 |
| 6949414 | Method of fabricating a thin and fine ball-grid array package with embedded heat spreader | Chi-Chuan Wu | 2005-09-27 |
| 6933175 | Method of fabricating a thin and fine ball-grid array package with embedded heat spreader | Chi-Chuan Wu | 2005-08-23 |
| 6864564 | Flash-preventing semiconductor package | Chun-Chi Ke, ChiChuan Wu | 2005-03-08 |
| 6798054 | Method of packaging multi chip module | Chi-Chuan Wu, Ssu-Cheng LAI | 2004-09-28 |
| 6753609 | Circuit probing contact pad formed on a bond pad in a flip chip package | Feng-Lung Chien, Chun-Chi Ke | 2004-06-22 |
| 6650009 | Structure of a multi chip module having stacked chips | Tzong-Dar Her, Chien-Ping Huang | 2003-11-18 |
| 6611434 | Stacked multi-chip package structure with on-chip integration of passive component | Tzong-Da Ho, Chi-Chuan Wu | 2003-08-26 |
| 6593662 | Stacked-die package structure | Han-Ping Pu, Tzong-Dar Her, Chien-Ping Huang, Cheng-Shiu Hsiao, Chi-Chuan Wu | 2003-07-15 |
| 6555902 | Multiple stacked-chip packaging structure | Chien-Ping Huang, Chi-Chuan Wu | 2003-04-29 |
| 6541310 | Method of fabricating a thin and fine ball-grid array package with embedded heat spreader | Chi-Chuan Wu | 2003-04-01 |
| 6528722 | Ball grid array semiconductor package with exposed base layer | Chien-Ping Huang | 2003-03-04 |
| 6507120 | Flip chip type quad flat non-leaded package | Chi-Chuan Wu | 2003-01-14 |
| 6507098 | Multi-chip packaging structure | Chi-Chuan Wu | 2003-01-14 |
| 6391758 | Method of forming solder areas over a lead frame | Jui-Meng Jao | 2002-05-21 |
| 6321976 | Method of wire bonding for small clearance | Han-Ping Pu, Tony T Yuan | 2001-11-27 |
| 6306682 | Method of fabricating a ball grid array integrated circuit package having an encapsulating body | Chien-Ping Huang, Tzong-Da Ho, Eric Ko, Jui-Meng Jao | 2001-10-23 |
| 6282096 | Integration of heat conducting apparatus and chip carrier in IC package | Chi-Chuan Wu | 2001-08-28 |
| 6282094 | Ball-grid array integrated circuit package with an embedded type of heat-dissipation structure and method of manufacturing the same | Jeng-Yuan Lai, Eric Ko, Tzong-Da Ho | 2001-08-28 |
| 6281578 | Multi-chip module package structure | Chi-Chuan Wu, Han-Ping Pu, Eric Ko | 2001-08-28 |
| 6258705 | Method of forming circuit probing contact points on fine pitch peripheral bond pads on flip chip | Feng-Lung Chien, Chun-Chi Ke | 2001-07-10 |
| 6242283 | Wafer level packaging process of semiconductor | Chi-Chuan Wu | 2001-06-05 |